Vertically Integrated Backside Illuminated Image Sensor

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Solution Overview

Problem

Conventional CMOS image sensors face limitations in quantum efficiency due to light obstruction from additional layers, particularly in front-side illuminated sensors, which reduces the number of photons converted into electrons.

Innovation Solution

The development of a vertically integrated backside illuminated image sensor, where the photodiode is exposed directly to light without obstructions, and logic circuits are stacked on top, allowing for a direct light path and improved quantum efficiency through the use of bonding pads and through-silicon vias, reducing form factor and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If additional layers (dielectric and interconnect metal layers) are formed on top of the substrate in FSI image sensors, then the device complexity and integration are improved, but the quantum efficiency deteriorates due to light obstruction from these layers

Engineering Contradiction:
Improvedevice integrationVSAvoidquantum efficiency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent inverts the conventional FSI architecture by implementing BSI (backside illuminated) design, where light enters through the backside of the substrate rather than the front. This inversion removes the light path obstruction caused by dielectric and interconnect metal layers, allowing light to directly reach the photodiode and significantly improving quantum efficiency while maintaining device integration through vertical stacking of functional layers on the frontside

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If a direct light path is implemented in BSI image sensors by removing obstructions, then the quantum efficiency is improved, but the device complexity increases due to the need for vertically integrated structures and through-silicon vias

Engineering Contradiction:
Improvequantum efficiencyVSAvoidvertical integration structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from a planar 2D layout to a 3D vertically integrated architecture. Functional layers including photodiodes, transistors, and interconnect structures are stacked vertically on the frontside of the substrate, while light enters through the backside. This dimensional change allows direct light path implementation without obstructions while accommodating complex device integration through vertical stacking, resolving the contradiction between simplified light path and increased structural complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the density and quantum efficiency of the image sensor, reducing power consumption and minimizing parasitic capacitance interference, while allowing for the integration of photodiodes and logic circuits with different process nodes, resulting in improved image acquisition and processing capabilities.

Implementation Method 1

A CMOS image sensor utilizes light-sensitive CMOS circuitry to convert photons into electrons. The light-sensitive CMOS circuitry typically comprises a photo-diode formed in a silicon substrate. As the photo-diode is exposed to light, an electrical charge is induced in the photo-diode.

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS9136302B2Apparatus for vertically integrated backside illuminated image sensors
Publication Date: 2015.09.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9136302B2 patent drawing
  • US9136302B2 patent drawing
  • US9136302B2 patent drawing

AI summary

A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.