BSI CMOS Sensor Isolation Structure for Low Crosstalk PDE
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Solution Overview
Problem
Backside illumination (BSI) optical sensors face challenges in reducing cross talk between sensing elements while maintaining a common voltage bias, which affects the Fill Factor and photon detection efficiency (PDE), particularly in applications requiring high sensitivity like LIDAR and medical imaging.
Innovation Solution
The method involves creating a trench grid or staggered line deep trench isolation structure from the backside of the silicon substrate, filled with insulating and conductive materials, and depositing an amorphous-silicon layer to connect all sensing elements to a common voltage bias without compromising the Fill Factor, thereby reducing cross talk and enhancing PDE.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If deep trench isolation structures are created from the backside to reduce cross talk between sensing elements, then cross talk is reduced, but it becomes impossible to connect all sensing elements to a common voltage bias
Solution Approach 1:
The isolation structure is segmented into two parts: a first isolation structure created from the front side and a second deep trench isolation structure created from the back side. The second structure lands in correspondence with the bottom surface of the first structure, creating a continuous isolation barrier while preserving electrical connection paths through the substrate thickness.
Solution Approach 2:
The isolation approach transitions from single-sided (front-side only) to dual-sided implementation, utilizing both the front side and back side of the substrate to create the complete isolation structure. This dimensional change allows the isolation to be effective while maintaining backside electrical access.
2Ease of operation
If additional contacts are added to connect each sensing element to common potential, then common voltage bias is achieved, but the Fill Factor decreases due to additional space requirements
Solution Approach 1:
Multiple sensing elements share a common backside surface for voltage application, merging the voltage connection function into a single shared interface rather than requiring individual contacts for each element. This combining approach maintains electrical connectivity while preserving sensing area.
3Object-affected harmful factors
If sensing elements are isolated from each other to reduce cross talk, then cross talk is reduced, but the Dark Count Rate increases due to spurious avalanches
Solution Approach 1:
The isolation structure is positioned locally adjacent to each sensing element, creating targeted isolation zones that suppress optical cross talk between neighboring elements while preserving the electrical and physical integrity of each individual sensing element's active region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively isolates sensing elements to minimize cross talk while allowing all elements to be connected to a common voltage, maintaining high photon detection efficiency and Fill Factor, thus improving the performance of BSI optical sensors.
Implementation Method 1
An electron-hole pair generated by incoming photon in the photodiode region (e.g. reversed biased p-n junction), which is biased above the breakdown voltage (multiplication region) can trigger an avalanche, due to the multiplication process by impact ionization of the space charge area of the photodiode.
Implementation Method 2
creating a trench grid or staggered line deep trench isolation structure from the backside of the silicon substrate, filled with insulating and conductive materials
Implementation Method 3
depositing an amorphous-silicon layer to connect all sensing elements to a common voltage bias
Data Source
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AI summary
The present invention relates to a method of manufacturing a backside illumination (BSI) CMOS optical sensor and more specifically to a method of reducing the cross talk and enhance the photon detection efficiency (PDE) in a backside illumination (BSI) CMOS optical sensor. In particular the claimed method comprises the step of creating an isolation structure between the adjacent sensing elements of the pixel-array of said BSI CMOS optical sensor, so as to isolate all the adjacent sensing elements from each other, and the step of creating a common voltage backside applying structure to all the sensing elements of said pixel-array, so as to connect all the sensing elements to a common voltage bias.