Buffer Chain Transition-Time Control for Low-Noise Current Ramps

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Solution Overview

Problem

Existing technologies face challenges in generating a ramped current or bias signal, which may be useful in the operation of a regenerative receiver, e.g., a regenerated or super-regenerative receiver, it is usually necessary to generate a voltage ramp and convert this ramp signal to a current via a voltage-to-current converter. However, such approaches are limited by the additional noise of the converter and reduced linearity of the converter, particularly when the supply voltage is low. Moreover, and in applications with regenerative receivers, and in particular with so-called super-regenerative receivers, such a current ramp generation must be supplemented by a system for measuring the start-up time and converting the start-up time to the digital domain, e.g. by way of a time-to-digital converter.

Innovation Solution

The electronic circuit comprises a chain of buffers with controllable transition times, regulated by an oscillator and a control circuit, allowing precise adjustment of the ramp time through a digital-to-analog converter and a dichotomy engine, which iteratively sets buffer current sources based on feedback and clock signals, independent of PVT conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a voltage-to-current converter is used to generate ramped current signal, then the current ramp can be generated, but additional noise is introduced and linearity is reduced

Engineering Contradiction:
Improvesignal qualityVSAvoidnoise
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts and removes the voltage-to-current converter from the system, replacing it with a direct current ramp generation approach using a chain of buffers with controllable transition times. This eliminates the source of additional noise and linearity degradation while maintaining the ability to generate the required ramped current signal.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent substitutes the electrical conversion mechanism (voltage-to-current converter) with a temporal control mechanism (buffer chain with controlled transition times). Instead of converting voltage to current through an analog converter, the system generates current ramps by controlling the switching timing of multiple buffers, replacing a noisy electrical conversion process with a cleaner temporal control approach.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If a voltage-to-current converter is used to generate ramped current signal, then the current ramp can be generated, but linearity is reduced particularly at low supply voltage

Engineering Contradiction:
Improvesignal linearityVSAvoidlinearity degradation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes the voltage-to-current converter that causes linearity degradation, especially at low supply voltages. The direct buffer-chain approach preserves signal linearity by avoiding the nonlinear characteristics inherent in analog converters.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the nonlinear voltage-to-current conversion process with a linear temporal control mechanism. The buffer chain generates current ramps through controlled switching events rather than continuous analog conversion, maintaining linearity across different supply voltage conditions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If a time-to-digital converter is added to measure start-up time, then start-up time measurement is enabled, but device complexity increases

Engineering Contradiction:
Improvestart-up time measurementVSAvoidconverter system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the measurement function into the existing buffer chain structure. The same buffers that generate the current ramp also provide the timing information through their transition times, eliminating the need for a separate time-to-digital converter and reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The buffer chain serves multiple functions: it generates the current ramp signal and simultaneously provides timing measurement capability. The transition times of the buffers are used both for current generation and for measuring start-up time, making the system more efficient and less complex.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Reliability

If buffer transition times are not controlled, then the buffer chain can operate simply, but the ramp time is not stable and depends on PVT conditions

Engineering Contradiction:
Improveramp time stabilityVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a control circuit that monitors and adjusts the transition times of buffers in the chain. This feedback mechanism ensures that the total transition time remains stable and meets design specifications, compensating for variations due to process, voltage, and temperature conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the transition time parameter of each buffer in the chain through the control circuit. By changing these parameters based on measured performance and PVT conditions, the system maintains stable ramp time generation despite environmental variations.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260005676A1Electronic circuit and method for adjusting a transition time of buffers of a buffer chain
Publication Date: 2026.01.01 THE SWATCH GRP RES & DEVELONMENT LTD
  • US20260005676A1 patent drawing
  • US20260005676A1 patent drawing
  • US20260005676A1 patent drawing

AI summary

An electronic circuit (100) including: a chain (12) of buffers (40, 40′, 40″), wherein each buffer (40) includes a buffer input (45), a buffer output (46), a buffer current source (44) and a buffer capacitor (43) and wherein a transition time of each buffer (40, 40′, 40″) is controllable by the buffer current source (44, 44′, 44″); an oscillator (70, 71, 72) configured to generate an oscillating reference signal; and a control circuit (80) coupled to the oscillator (70, 71, 72) and coupled to the buffer current sources (44, 44′, 44″) of the buffers (40, 40′, 40″) and operable to adjust the transition time of each buffer (40, 40′, 40″) on the basis of the oscillating reference signal.