Buffer Die Memory Package With Parallel Reed-Solomon ECC
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Solution Overview
Problem
Existing semiconductor memory devices face inefficiencies and compatibility issues due to the use of external module logic and buffers, which can lead to reliability and error correction limitations.
Innovation Solution
Incorporating a buffer die within the memory package to facilitate direct communication with controllers and host systems, reducing the need for external buffers and enabling parallel error correction coding across multiple memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If external module logic and buffers are used, then communication between memory devices and controllers is established, but reliability and error correction capabilities are reduced
Solution Approach 1:
The patent merges the buffer die with the memory package, integrating error correction functionality directly into the memory device. This consolidation eliminates external buffers and module logic, improving reliability while reducing system complexity through unified error correction coding across multiple memory devices.
Solution Approach 2:
The buffer die is designed to perform multiple functions including error detection, error correction, and data buffering. By making the buffer die universal and multi-functional, the system achieves enhanced error correction capabilities without requiring separate dedicated components, thereby improving reliability without proportionally increasing complexity.
2Adaptability or versatility
If multiple memory devices are packaged together with external buffers, then communication is facilitated, but compatibility issues and quality control problems arise
Solution Approach 1:
By integrating the buffer die within the memory package, the patent creates a unified multi-device package that improves compatibility. The merged structure ensures that all memory devices in the package work together with a single error correction system, eliminating compatibility issues that arise from separate external buffers manufactured by different entities.
3Reliability
If error correction computations are distributed across multiple memory devices, then error correction capabilities are enhanced, but computational complexity increases
Solution Approach 1:
The patent segments error correction computations across multiple memory devices in parallel. Each memory device performs error correction on its local data independently, then results are combined. This segmentation approach enhances overall error correction capabilities while managing computational complexity through distributed parallel processing rather than centralized computation.
Data Source
AI summary
A memory package may include multiple memory devices and a buffer die in some examples. The memory package may utilize Reed Solomon (RS) coding for error detection and correction. The computations for RS coding may be divided between the memory devices and/or the buffer die. One or more computations for generating a codeword from data may be performed by the buffer die, and the codeword may be stored in one or more of the memory devices in some examples. In some examples, the memory devices may perform computations for determining a syndrome for the codeword. One or more of the computations may be performed in parallel. In some examples, the buffer die may perform computations based on results of the of memory devices to arrive at the syndrome.


