Buffer Epitaxial Region Layout for GAA Leakage Suppression
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Solution Overview
Problem
The integration of gate-all-around (GAA) transistors in semiconductor devices faces challenges with strong leakage currents due to dopant diffusion from source/drain epitaxial features into the semiconductor substrate, particularly when the buffer semiconductor region is epitaxially grown from a (100) crystal plane, leading to insufficient coverage of mesa sidewalls and gaps between shallow trench isolation features.
Innovation Solution
The method involves forming a semiconductor device on a (110) crystal oriented substrate, where the buffer semiconductor region is epitaxially grown from a (110) crystal plane, ensuring sufficient coverage of mesa sidewalls and filling gaps between STI features to prevent dopant diffusion, thereby suppressing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the buffer semiconductor region is epitaxially grown from a (100) crystal plane, then the epitaxial growth can be performed, but the mesa sidewalls are insufficiently covered and gaps remain between shallow trench isolation features, leading to strong leakage currents
Solution Approach 1:
The patent changes the crystal orientation parameter of the substrate from (100) to (110). This parameter change fundamentally alters the epitaxial growth morphology, enabling the buffer semiconductor region to fully cover the mesa sidewalls and eliminate gaps between isolation features, thereby resolving the leakage current issue while maintaining manufacturing feasibility
2Reliability
If a gate structure extends around the bottommost channel layer, then gate control is improved, but dopant diffusion into the substrate causes strong leakage current
Solution Approach 1:
The patent introduces a buffer semiconductor region as an intermediary layer between the source/drain epitaxial features and the semiconductor substrate. This intermediate layer acts as a barrier to dopant diffusion, preventing dopants from reaching the substrate while allowing the gate structure to maintain its control over the channel layer, thus eliminating the harmful leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively blocks dopant diffusion, reducing leakage currents and enhancing the performance of GAA transistors by improving gate control and reducing manufacturing costs.
Implementation Method 1
the buffer semiconductor region is epitaxially grown from a (110) crystal plane
Implementation Method 2
effectively blocks dopant diffusion, reducing leakage currents
Data Source
AI summary
A method includes forming a semiconductor fin protruding from a semiconductor substrate. The semiconductor fin has an epitaxial portion and a mesa portion under the epitaxial portion. The epitaxial portion has a plurality of channel layers interleaved with a plurality of sacrificial layers. The semiconductor substrate has a top surface in (110) crystal plane. The method also includes forming a dummy gate structure across the semiconductor fin, removing at least the epitaxial portion of the semiconductor fin in a region adjacent the dummy gate structure to form a recess, epitaxially growing a buffer semiconductor region in the recess, epitaxially growing a source/drain feature on the buffer semiconductor region, and replacing the dummy gate structure with a metal gate structure. The buffer semiconductor region has a top surface in (110) crystal plane.