Peripheral Buffer Layer in 3D Capacitors to Prevent Shorting
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Solution Overview
Problem
Existing methods for integrating capacitors or ionic capacitors in porous anodized alumina structures face challenges such as electrical shorting due to non-selective etching, which damages thin dielectric or ionic conductor layers, especially when using solid-state electrolytes like LiPON, leading to irregular surfaces and reduced capacitance density.
Innovation Solution
Incorporating a buffer layer made of insulating material between the intermediate and bottom electrode layers, or between the intermediate and top electrode layers, with an opening that defines a central active region, preventing electrical shorting by spacing them apart and allowing conformal deposition of the intermediate and top electrode layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If non-selective etching is used to define the edge of the conductive layer, then the etching process is simple and fast, but the thin dielectric or ionic conductor layer is damaged causing electrical shorting and irregular surfaces
Solution Approach 1:
A buffer layer is introduced as an intermediary between the top electrode and the thin dielectric/ionic conductor layer. This buffer layer serves as a protective mediator that prevents the etching process from damaging the underlying thin layers, thereby maintaining electrical insulation while allowing efficient etching of the conductive layer edge.
Solution Approach 2:
The buffer layer is formed in advance before the etching process. This preliminary action prepares the structure by creating a protective barrier that will prevent damage during the subsequent etching step, ensuring that the thin dielectric or ionic conductor layer remains intact while the conductive layer is properly defined.
2Quantity of substance
If the thickness of the dielectric layer is reduced to increase capacitance density, then energy storage density increases, but dielectric breakdown occurs when operating voltage is applied
Solution Approach 1:
The patent employs a composite structure consisting of the thin dielectric layer combined with the buffer layer. This composite material approach allows the thin dielectric to provide high capacitance density while the buffer layer provides additional electrical insulation, preventing dielectric breakdown and maintaining reliability.
3Ease of manufacture
If conventional planar structures are used, then manufacturing is simple, but energy storage density is low
Solution Approach 1:
The patent transitions from conventional planar (2D) structures to three-dimensional structures by forming the buffer layer and subsequent layers conformally over a contoured surface. This dimensional change increases the surface area available for capacitance without significantly increasing the footprint, thereby enhancing energy storage density while maintaining manufacturing feasibility through conformal deposition techniques.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents electrical shorting and maintains capacitance density by ensuring selective etching, even with thin dielectric or ionic conductor layers, thereby enhancing the reliability and performance of energy storage components.
Implementation Method 1
the intermediate layer is spaced apart from either the bottom electrode layer or the top electrode layer by a buffer layer in a peripheral region that surrounds the central region
Implementation Method 2
the intermediate layer and the top electrode layer being arranged conformally above the bottom electrode layer
Implementation Method 3
energy is stored via accumulation of mobile charges (ions such as Li+, Na+, etc.) at the electrolyte/electrode interfaces through electrostatic and/or redox processes
Implementation Method 4
energy is stored via accumulation of mobile charges (ions such as Li+, Na+, etc.) at the electrolyte/electrode interfaces through electrostatic and/or redox processes
Implementation Method 5
these ionic capacitors may also be accommodated within the pores of a 3D structure so as to increase the capacitance density
Data Source
AI summary
An integrated electrical device that includes an energy storage component, the component having, above a support, a bottom electrode layer, an intermediate layer having a dielectric layer or an ionic conductor layer above the bottom electrode layer, and a top electrode layer above and on the intermediate layer, wherein the intermediate layer is in contact with the bottom electrode layer and with the top electrode layer in a central region, and the intermediate layer is are spaced apart from either the bottom electrode layer or the top electrode layer by a buffer layer in a peripheral region that surrounds the central region, the buffer layer including an insulating material and arranged on the bottom electrode layer or on the intermediate layer, the buffer layer having an opening that opens onto the bottom electrode layer or onto the intermediate layer so as to define the central region.