Buffer Layer Epitaxy for Low Dislocation Density in Light-Emitting Units

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Solution Overview

Problem

The challenge in forming epitaxial stacks of III-V semiconductor compounds is the high dislocation density caused by lattice mismatch between the substrate and the epitaxial layer, which degrades light-emitting or light-absorbing efficiency.

Innovation Solution

A method involving the epitaxial growth of a buffer layer with a dislocation density less than 1*10^9 cm^-2, lattice-mismatched to both the substrate and the reaction layer, using multiple annealing procedures to release stress and reduce dislocation density, and forming a light-emitting stack with a multi-quantum well structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the substrate and epitaxial layer are lattice-matched to reduce dislocation density, then the light-emitting efficiency is improved, but the composition ratio adjustment of IIIA element to VA element is restricted

Engineering Contradiction:

Improvelight-emitting efficiencyVSAvoidcomposition ratio adjustment

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

A buffer layer is introduced as an intermediary between the substrate and the epitaxial layer. The buffer layer has a lattice constant that is intermediate between the substrate and the epitaxial layer, allowing the substrate and epitaxial layer to have different lattice constants while maintaining low dislocation density. This enables composition ratio adjustment in the epitaxial layer without requiring strict lattice matching to the substrate.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Manufacturing precision

If multiple annealing procedures are applied to reduce dislocation density, then the buffer layer quality is improved, but the manufacturing process complexity increases

Engineering Contradiction:

Improvebuffer layer qualityVSAvoidmanufacturing process complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

Multiple annealing procedures with different temperature parameters are applied to the buffer layer. The first annealing is performed at a first temperature to reduce dislocation density, and the second annealing is performed at a second temperature to further reduce dislocation density. By changing the temperature parameters in sequence, the buffer layer quality is significantly improved while managing the process complexity through systematic parameter variation.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces dislocation density and enhances the light-emitting efficiency by forming a high-quality buffer layer that mitigates lattice mismatch issues, resulting in improved performance of the semiconductor light-emitting unit.

Implementation Method 1

epitaxially growing a buffer layer on the reaction layer

Methodology Applied

Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

using multiple annealing procedures to release stress and reduce dislocation density

Methodology Applied

Scientific EffectAnnealing: Annealing

Data Source

PatentUS10121933B2Semiconductor device and the manufacturing method thereof

Publication Date: 2018.11.06 ENNOSTAR CORP

AI summary

The present disclosure discloses a method forming a semiconductor light-emitting unit, comprising the steps of providing a semiconductor substrate; epitaxially growing a reaction layer on the semiconductor substrate; and epitaxially growing a buffer layer on the reaction layer; wherein the buffer layer and the semiconductor substrate are lattice-mismatched, and a dislocation density of the buffer layer is smaller than smaller than 1*109 cm−2.