Memory Buffer Skid Mode for Low-Latency Freshness Verification

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Solution Overview

Problem

Existing buffer devices experience high latency due to the need for complete freshness verification of data before transmission, which hampers performance in distributed processing systems.

Innovation Solution

Implementing a skid mode of operation in buffer devices that allows for immediate transmission of read data prior to completing freshness verification, combined with a containment mode for thorough verification, using a message authentication code (MAC) freshness generator and a freshness counter tree to enhance security and reduce latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If complete freshness verification is performed before data transmission, then data security and integrity are improved, but transmission latency increases

Engineering Contradiction:

Improvedata freshness verificationVSAvoidtransmission latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary freshness verification by generating and storing message authentication codes (MACs) with freshness counters during data writing operations. This preliminary action allows the verification to be partially completed in advance, so that during read operations, only the final MAC comparison is needed rather than complete verification, thus reducing transmission latency while maintaining data security.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The freshness verification process is segmented into multiple components: freshness counter generation, MAC computation, and MAC verification. The counter circuitry segments the verification by maintaining hierarchical counters (page-level, block-level, chip-level) that can be verified independently. This segmentation allows partial verification to proceed in parallel with data transmission, reducing overall latency while ensuring data integrity.

Inventive Principle:

Principle #1Segmentation

2Reliability

If thorough freshness verification is performed, then data integrity is improved, but processing complexity increases

Engineering Contradiction:

Improvedata integrityVSAvoidverification process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The system uses counter copies stored in different locations (page copies, block copies, chip copies) to verify freshness. Instead of complex verification logic, the system simply compares MACs generated from these counter copies against stored MACs. This copying approach simplifies the verification process while maintaining thorough data integrity checks through hierarchical counter validation.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

Message authentication codes (MACs) serve as intermediaries between the freshness counters and the verification process. The MAC computation circuitry transforms the hierarchical counter values into verifiable MACs, which then mediate the freshness verification. This intermediary approach simplifies the overall verification complexity by providing a standardized verification mechanism that works across different counter levels.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12469529B2Buffer device with low-latency skid mode for data freshness

Publication Date: 2025.11.11 RAMBUS INC

AI summary

A buffer integrated circuit (IC) chip is disclosed. The buffer IC chip includes host interface circuitry to receive a read command to retrieve read data from a memory. Memory interface circuitry couples to the memory. Data freshness authentication circuitry performs a freshness verification operation on the read data. Read data forwarding circuitry, in a skid mode of operation, transmits the read data to the host prior to completion of the freshness verification operation.