Communication Buffer Voltage Ramp Control for Glitch-Free Signaling
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Solution Overview
Problem
Existing communication buffer logic in integrated circuits experiences improper and inaccurate behavior during ramp up and ramp down operations due to voltage level changes, leading to glitches and signal integrity issues, and relies on external switches that cause additional signal degradation.
Innovation Solution
Implementing power ramp sensor logic to detect voltage levels and control communication buffer logic, generating predetermined communication signals during voltage ramping periods to maintain signal integrity and avoid external switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If communication buffer logic is used during voltage ramping operations, then communication signals can be transmitted, but signal integrity deteriorates and glitches occur
Solution Approach 1:
The power ramp sensor logic detects voltage levels in advance during ramping operations and generates control signals to prevent the communication buffer logic from operating during unstable voltage conditions. This preliminary detection and control action ensures that communication signals are only transmitted when voltage levels are stable, thereby maintaining signal integrity while enabling communication when safe to do so.
2Reliability
If external switches are used to control communication buffer logic, then voltage level control is achieved, but additional signal degradation occurs due to impedance matching issues
Solution Approach 1:
The invention extracts the control function from external switches and implements it internally using power ramp sensor logic that monitors voltage levels and generates control signals directly. This eliminates the need for external switches and their associated impedance matching problems, thereby removing the source of signal degradation while maintaining effective voltage level control for the communication buffer logic.
Solution Approach 2:
The power ramp sensor logic acts as an intermediary between the voltage sources and the communication buffer logic. Instead of using external switches that cause signal degradation, the sensor logic internally mediates the control by detecting voltage levels and generating appropriate control signals, thereby eliminating the harmful impedance matching issues while achieving the same voltage control objective.
3Reliability
If multiple voltage sources are used for core logic and communication buffer logic, then proper voltage levels are maintained, but complex power domain management is required
Solution Approach 1:
The power ramp sensor logic provides self-service by automatically detecting the voltage levels of multiple voltage sources and generating the appropriate control signals without external intervention. This self-monitoring and self-control mechanism simplifies power domain management by eliminating the need for complex external control circuits, while still maintaining proper voltage levels for both core logic and communication buffer logic operations.
Data Source
AI summary
An integrated circuit is capable of controlling a communication signal by using power ramp controlled communication buffer logic to generate an outgoing communication signal based on a detected voltage on a voltage source. The voltage source is necessary to supply power for power ramp controlled communication buffer logic. The voltage on the voltage source may be detected using power ramp sensor logic. The outgoing communication signal is based on a core logic output signal if the detected voltage is greater than or equal to a predetermined voltage level. If, the detected voltage is less than the predetermined voltage level, the outgoing communication signal is predetermined to be one of: a tristate outgoing communication signal, a logic one outgoing communication signal and a logic zero outgoing communication signal. Power ramp controlled communication buffer logic may also generate a core logic input signal based on an incoming communication signal in response to the detected voltage.