Bulk Overlay Mark Structure for High-Contrast Alignment

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Solution Overview

Problem

Existing overlay marks in semiconductor processes often lack clear optical images and low contrast, leading to alignment measurement errors.

Innovation Solution

A manufacturing method that forms an overlay mark with high optical image contrast by using partially overlapping mask rings and a mask pattern layer to create a bulk overlay mark integrated with semiconductor device formation steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If an overlay mark with the same pattern as the pad array is formed in the peripheral region, then the formation steps can be integrated with device region steps, but the optical image contrast becomes low and alignment measurement errors occur

Engineering Contradiction:
Improveintegration of formation stepsVSAvoidalignment measurement accuracy
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent applies local quality by creating a bulk overlay mark with different structural properties in the peripheral region compared to the pad array in the device region. The overlay mark uses a three-layer structure (first dielectric layer, second dielectric layer, and third dielectric layer) with specific thickness variations and material compositions that differ from the device region structures. This localized structural differentiation enables high optical contrast for alignment measurement while maintaining process integration, as the same deposition and patterning steps are used across both regions but produce different structural outcomes based on local layer configurations

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent transitions from a two-dimensional planar pattern to a three-dimensional bulk structure by forming multiple dielectric layers with varying thicknesses (first dielectric layer with thickness T1, second dielectric layer with thickness T2, and third dielectric layer with thickness T3). This vertical dimensionality creates optical path differences that enhance contrast when viewed through optical instruments, allowing alignment marks to be distinguished clearly from surrounding structures while maintaining compatibility with standard semiconductor fabrication processes

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If a simple pad array pattern is used for the overlay mark, then the manufacturing process is simplified, but the optical image clarity and contrast are insufficient

Engineering Contradiction:
Improveoverlay mark structureVSAvoidoptical image contrast
Core Design Contradiction:
Device complexityVSIllumination intensity

Solution Approach 1:

The patent employs composite materials by combining multiple dielectric layers with different optical properties (refractive indices and absorption coefficients) to form the overlay mark structure. The first dielectric layer, second dielectric layer, and third dielectric layer are composed of different materials or have different thicknesses, creating optical interference effects that enhance contrast. This composite structure allows the overlay mark to maintain a relatively simple geometric pattern while achieving high optical visibility through material property differentiation rather than geometric complexity

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20250308925A1Manufacturing method of overlay mark
Publication Date: 2025.10.02 WINBOND ELECTRONICS CORP
  • US20250308925A1 patent drawing
  • US20250308925A1 patent drawing
  • US20250308925A1 patent drawing

AI summary

A manufacturing method of an overlay mark including the following steps is provided. A first mask ring is formed on a target layer. A first dielectric layer is formed on the first mask ring. A second mask ring is formed on the first dielectric layer. The second mask ring, the first dielectric layer and the first mask ring are patterned to form a third mask ring on the target layer corresponding to the overlapping region of the first and the second mask rings. A second dielectric layer is formed on the target layer and the third mask ring. A mask pattern layer having an opening is formed on the second dielectric layer. The inner sidewall of the opening is aligned with that of the third mask ring. A part of the second dielectric layer and the target layer are removed using the mask pattern layer as a mask.