Buried Bit Line Fabrication with Etch Stop Protection

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Solution Overview

Problem

As semiconductor devices shrink, the resistance of buried bit lines formed through ion implantation techniques reaches limits, and the surface of these bit lines is prone to damage during subsequent processes, limiting further integration and performance enhancement.

Innovation Solution

A method for fabricating semiconductor devices that includes forming isolated bodies by etching a substrate, creating buried bit lines using a conductive metal layer like tungsten, and applying an etch stop layer to protect the bit lines from damage during subsequent processes, while reducing resistance and maintaining the integrity of the device structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ion implantation technique is used to form buried bit lines, then the resistance of buried bit lines can be reduced, but the surface of the buried bit lines becomes damaged and vulnerable to subsequent processes

Engineering Contradiction:
Improveresistance of buried bit linesVSAvoidsurface damage of buried bit lines
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

An etch stop layer is introduced as an intermediary protective layer between the buried bit line and the subsequent processing steps. This etch stop layer prevents direct exposure of the buried bit line surface to damaging processes while allowing the ion implantation technique to effectively reduce resistance. The etch stop layer acts as a mediator that protects the sensitive buried bit line surface during subsequent fabrication steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The etch stop layer is formed in advance before subsequent processing steps that could damage the buried bit line surface. By performing this protective action preliminarily, the patent prevents surface damage before it can occur during later fabrication processes, while still allowing the ion implantation to reduce resistance effectively.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If device size is reduced to increase integration degree, then more cells can be integrated, but the resistance reduction capability of ion implantation technique reaches its limit

Engineering Contradiction:
Improveintegration degreeVSAvoidresistance reduction capability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the approach from relying solely on ion implantation parameters to include the introduction of an etch stop layer with specific material properties. This parameter change enables continued scaling and integration improvement without being constrained by the diminishing resistance reduction capability of ion implantation in smaller geometries.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining the buried bit line material with an etch stop layer material. This composite approach allows the buried bit line to maintain low resistance while the etch stop layer provides protective functionality, enabling continued device scaling and integration improvement.

Inventive Principle:
Principle #40Composite materials

3Adaptability or versatility

If multiple processes are performed after forming buried bit lines, then device functionality is enhanced, but the surface of the buried bit lines is damaged

Engineering Contradiction:
Improvedevice functionalityVSAvoidsurface damage
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The etch stop layer serves as a protective intermediary that allows multiple subsequent processes to be performed on the device without directly damaging the buried bit line surface. This intermediary layer enables enhanced device functionality through additional processing steps while preventing surface degradation of the buried bit line.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively decreases the resistance of buried bit lines, protects them from damage, and allows for further miniaturization of semiconductor devices without deteriorating device characteristics, enabling high-speed operation and integration in sub-50 nm-class DRAM processes.

Implementation Method 1

forming an etch stop layer on an upper surface of the buried bit line

Methodology Applied
Scientific EffectEtch stop:

Data Source

PatentUS8399342B2Method for fabricating semiconductor device with buried bit lines
Publication Date: 2013.03.19 SK HYNIX INC
  • US8399342B2 patent drawing
  • US8399342B2 patent drawing
  • US8399342B2 patent drawing

AI summary

A method for fabricating a semiconductor device includes forming a plurality of bodies isolated by trenches by etching a substrate, forming a buried bit line gap-filling a portion of each trench, forming an etch stop layer on an upper surface of the buried bit line; and forming a word line extended in a direction crossing the buried bit line over the etch stop layer.