Buried Bitline Fabrication for Semiconductor Integration
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Solution Overview
Problem
Conventional semiconductor devices face challenges in reducing the size of memory cells, leading to deteriorated data retention and degraded device characteristics due to shortened channel lengths in MOSFETs, which necessitate high aspect ratio etching and increase the risk of punch-through and pattern leaning.
Innovation Solution
A method for fabricating semiconductor devices with buried bit lines involves forming active regions separated by trenches, supports, and shallower second trenches, followed by the formation of spacers, punch-through preventing patterns, and buried bit lines in recessed sidewalls, which reduces the aspect ratio and prevents punch-through between adjacent bit lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length of MOSFET is shortened to reduce memory cell size, then the degree of integration is improved, but data retaining properties deteriorate and device characteristics are degraded
Solution Approach 1:
The patent transitions from planar channel transistors to vertical channel transistors, changing the channel orientation from horizontal to vertical. This dimensional change allows the channel to extend in the depth direction rather than the lateral direction, enabling continued integration improvement without further channel length shortening that would harm data retention.
Solution Approach 2:
Instead of continuing to shorten the channel length in the conventional planar direction, the patent inverts the approach by extending the channel vertically. The bit line is buried beneath the channel structure rather than being positioned above, fundamentally inverting the traditional transistor architecture to solve the integration versus reliability contradiction.
2Stability of the object's composition
If high aspect ratio etching is performed to form body lines at the required height, then the structural integrity is maintained, but pattern leaning occurs
Solution Approach 1:
The patent performs preliminary etching to form the body line trenches and forms supports at the bottom of these trenches before forming the pillars. This preliminary action creates a stable foundation that prevents pattern leaning during subsequent high aspect ratio etching processes, maintaining both structural integrity and manufacturing precision.
Solution Approach 2:
The patent introduces supports as intermediary structures at the bottom of the body line trenches. These supports act as mediators that provide mechanical stability during the etching process, preventing pattern leaning while allowing the body lines to be formed at the required height with proper structural integrity.
3Reliability
If the height under buried bit lines is increased to prevent punch-through, then punch-through prevention is achieved, but the total height increases requiring higher aspect ratio etching
Solution Approach 1:
The patent changes the spatial arrangement by burying the bit line beneath the channel structure in the depth direction rather than positioning it laterally above the channel. This dimensional reconfiguration allows sufficient separation distance for punch-through prevention without increasing the vertical height that would require higher aspect ratio etching.
Solution Approach 2:
Instead of increasing the height above the bit line to prevent punch-through, the patent inverts the approach by placing the bit line at the bottom and extending the channel upward. This inversion achieves punch-through prevention through proper spatial separation without increasing the etching aspect ratio.
Data Source
AI summary
A method for fabricating a semiconductor device includes forming active regions which are separated by a plurality of first trenches, forming supports which fill the first trenches; etching the active regions and defining second trenches which are shallower than the first trenches, forming spacers on sidewalls of the second trenches, etching bottoms of the second trenches and defining third trenches, forming punch-through preventing patterns which fill lower portions of the third trenches, etching sidewalls which are not protected by the punch-through preventing patterns and the spacers, and forming recessed sidewalls which face each other, and forming buried bit lines in the recessed sidewalls.