Buried Doped ESD Structure for Bidirectional Low-Resistance Protection
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Solution Overview
Problem
Conventional electrostatic discharge (ESD) protective circuits with bipolar devices have high resistance and are unidirectional, limiting their effectiveness in supporting both positive and negative voltage biases, and often require a larger surface area.
Innovation Solution
The integration of a semiconductor substrate with a first well containing a first and second doped region, and a buried doped region that overlaps underneath the first doped region, forming a P-N-P structure that expands and relaxes the electric field to increase the trigger current for bi-directional current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protective circuits are used, then they can protect sensitive components from electrostatic discharge, but they require a larger surface area
Solution Approach 1:
The patent introduces a vertical dimension by forming a buried doped region beneath the surface doped regions. This three-dimensional configuration allows the ESD protection structure to utilize the vertical depth of the semiconductor substrate, thereby reducing the required horizontal surface area while maintaining protection effectiveness.
Solution Approach 2:
The buried doped region is nested within the semiconductor substrate beneath the surface doped regions, creating a hierarchical structure where the ESD protection mechanism operates at multiple depth levels. This nesting allows compact integration without sacrificing protection capability.
2Reliability
If conventional ESD protective circuits are used, then they can route excess current away from sensitive components, but they have unacceptably high resistance when activated
Solution Approach 1:
The patent combines surface doped regions with a buried doped region to form an integrated ESD protection structure. This merging creates multiple parallel current conduction paths through the semiconductor substrate, reducing overall resistance while maintaining the ability to route excess current away from sensitive components.
Solution Approach 2:
The buried doped region provides localized high-conductivity pathways deep within the substrate, creating regions of enhanced electrical conductivity specifically where current routing is needed. This local quality improvement reduces resistance without affecting the entire device uniformly.
3Reliability
If conventional ESD protective circuits with bipolar devices are used, then they can provide ESD protection, but they only support flow of current in one direction and cannot support positive and negative voltage biases
Solution Approach 1:
The symmetric arrangement of doped regions with the buried doped region in the center creates a universal ESD protection structure that can handle both positive and negative voltage biases. The structure performs multiple functions: protecting against both polarities of electrostatic discharge and providing low-resistance current routing in either direction.
Solution Approach 2:
The patent employs symmetric doping configurations where doped regions are positioned at equal distances from the buried doped region on opposite sides. This symmetry (a form of controlled asymmetry breaking) enables bidirectional operation by ensuring equivalent electrical characteristics for both positive and negative voltage applications.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the 'on resistance' and allows the ESD protective structure to be triggered by sufficient positive or negative voltage biases, while minimizing the required surface area, enabling efficient and symmetrical operation.
Implementation Method 1
A first terminal including a first doped region in the first well; a second terminal including a second doped region in the first well
Implementation Method 2
a first buried doped region in the first well, the first buried doped region overlapping with and underneath the first doped region
Data Source
AI summary
The disclosure provides a structure with a buried doped region, and methods to form the same. A structure may include a semiconductor substrate including a first well. A first terminal includes a first doped region in the first well. A second terminal includes a second doped region in the first well. The first well horizontally separates the first doped region from the second doped region. A first buried doped region is in the first well. The first buried doped region overlaps with, and is underneath, the first doped region. The first well vertically separates the first doped region from the first buried doped region.