Buried Dual Gate Electrode Suppresses GIDL in Scaled Semiconductors

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Solution Overview

Problem

As semiconductor devices are scaled down, short-channel effects and gate-induced drain leakage (GIDL) become significant performance issues due to increased doping concentration and reduced gate oxide thickness, leading to a challenge in balancing high current driving capability with low GIDL current.

Innovation Solution

A semiconductor structure with a buried dual gate electrode is developed, featuring a metal gate electrode with a protruding member and a polysilicon gate electrode, where the protruding member allows for the removal of polysilicon gate material without significantly reducing the metal gate electrode volume, thereby suppressing GIDL and maintaining low gate resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If the gate oxide thickness is reduced to scale down device size, then device integration density is improved, but gate-induced drain leakage (GIDL) increases significantly

Engineering Contradiction:
Improvedevice integration densityVSAvoidgate-induced drain leakage
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The gate electrode is segmented into two distinct materials: a first gate material (e.g., metal with high work function) and a second gate material (e.g., polysilicon with low work function). This segmentation allows each material to perform different functions - the first material provides high current driving capability while the second material suppresses GIDL at the gate-drain interface, thereby resolving the contradiction between device scaling and leakage reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different materials are applied to different regions of the gate electrode structure. The first gate material is positioned in regions requiring high current driving capability, while the second gate material with low work function is positioned at the gate-drain interface where GIDL suppression is critical. This local differentiation of material properties allows simultaneous optimization of both current drive and leakage suppression.

Inventive Principle:
Principle #3Local quality

2Power

If the doping concentration is increased to improve current driving capability, then transistor performance is improved, but short-channel effects and GIDL become more significant

Engineering Contradiction:
Improvecurrent driving capabilityVSAvoidshort-channel effects and GIDL
Core Design Contradiction:
PowerVSObject-generated harmful factors

Solution Approach 1:

The gate electrode is divided into two functional segments with different materials. The first gate material enables high current driving capability to meet power requirements, while the second gate material specifically targets and suppresses GIDL and short-channel effects at the gate-drain interface, thereby resolving the contradiction between power performance and harmful effects.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The work function parameter of the gate electrode is changed by introducing a second gate material with distinctly different work function characteristics. This parameter change at the gate-drain interface directly addresses and suppresses GIDL and short-channel effects while maintaining the current driving capability provided by the first gate material.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If a dual gate electrode structure is implemented to suppress GIDL, then GIDL current is reduced, but device complexity increases

Engineering Contradiction:
ImproveGIDL currentVSAvoidgate electrode structure
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The gate electrode is segmented into two materials that can be deposited using standard sequential CVD processes, making the fabrication relatively straightforward. The segmentation is achieved through controlled deposition where the first gate material is deposited initially, followed by the second gate material, allowing GIDL suppression without requiring complex multi-step fabrication sequences.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dual gate electrode structure merges two different gate materials into a single integrated gate structure that functions as one unified component. This merging approach suppresses GIDL while maintaining a relatively simple device architecture that can be fabricated using modified but not fundamentally new process steps.

Inventive Principle:
Principle #5Merging (Combining)

4Object-generated harmful factors

If the metal gate electrode volume is reduced to accommodate polysilicon gate material, then GIDL is suppressed, but gate resistance increases excessively

Engineering Contradiction:
ImproveGIDLVSAvoidgate resistance
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The second gate material (polysilicon) is applied locally only where needed for GIDL suppression, typically as a thin layer at the gate-drain interface region, while the majority of the gate electrode volume retains the first gate material (metal) that provides low resistance. This local application strategy suppresses GIDL without significantly increasing overall gate resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The gate electrode is formed as a composite structure combining two different materials - a metal gate material for low resistance and current driving capability, and a polysilicon gate material for GIDL suppression. This composite structure leverages the advantageous properties of both materials simultaneously, achieving GIDL suppression while maintaining acceptable gate resistance through proper material combination and spatial arrangement.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS11605718B2Method for preparing semiconductor structure having buried gate electrode with protruding member
Publication Date: 2023.03.14 NAN YA TECH
  • US11605718B2 patent drawing
  • US11605718B2 patent drawing
  • US11605718B2 patent drawing

AI summary

The present disclosure provides a method for preparing a semiconductor structure. The method includes providing a substrate comprising a first top surface; forming an isolation region in the substrate to surround an active region; implanting a plurality of dopants into the substrate to form a first impurity region, a second impurity region and a third impurity region in the active region; forming a gate trench in the active region; forming a first barrier layer on a portion of a sidewall of the gate trench; forming a first gate material in the gate trench, wherein the first gate material comprises a first member surrounded by the first barrier layer; forming a second barrier layer on the first barrier layer and the first gate material; forming a second gate material on the second barrier layer; and forming a gate insulating material on the second gate material.