Buried Transmission Gate Layout for Low-Noise Image Sensors
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Solution Overview
Problem
In image sensors, the reduction in pixel size leads to defects and noise due to the floating diffusion region contacting the internal walls of the transmission gate, causing trap sites and reduced image quality.
Innovation Solution
The design includes a substrate with a floating diffusion region apart from the side walls of the transmission gates, utilizing spacers on the gate side walls as a self-alignment mask to prevent dopant-related noise, and a dual-type buried gate structure with a gate connection, which reduces parasitic capacitance and increases conversion gain.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the pixel size is reduced to increase pixel density, then the productivity and resolution of the image sensor are improved, but the floating diffusion region contacts the internal walls of the transmission gate causing trap sites and noise
Solution Approach 1:
An intrinsic semiconductor region is introduced as an intermediary between the floating diffusion region and the transmission gate. This intermediate layer prevents direct contact between the floating diffusion region and the internal walls of the transmission gate, thereby eliminating trap sites and noise while maintaining the reduced pixel size configuration.
Solution Approach 2:
The patent extends the solution into the vertical dimension by forming the intrinsic semiconductor region that vertically overlaps the spacers and gate connection. This three-dimensional approach allows the floating diffusion region to be separated from the transmission gate walls in the horizontal plane while maintaining compact pixel layout.
2Area of moving object
If the floating diffusion region is placed close to the transmission gate to minimize area, then the pixel area is reduced, but dopant-related noise and trap sites increase
Solution Approach 1:
The intrinsic semiconductor region serves as a mediator that allows the floating diffusion region to be positioned close to the transmission gate horizontally while preventing dopant-related noise through vertical separation. The spacers on the transmission gate side walls act as self-alignment masks during dopant implantation, ensuring the intrinsic region is formed only where needed.
Solution Approach 2:
The intrinsic semiconductor region is formed locally only in specific areas where it is needed - between the floating diffusion region and transmission gate, and vertically overlapping the spacers and gate connection. This localized approach minimizes the overall pixel area while providing noise prevention exactly where required.
3Reliability
If a dual-type buried gate structure with gate connection is used, then parasitic capacitance is reduced and conversion gain increases, but the device complexity increases
Solution Approach 1:
The transmission gate is segmented into a dual-type buried gate structure with separate first and second buried gates extending to different depths in the substrate. This segmentation allows each gate to be optimized for specific functions, reducing parasitic capacitance while maintaining controllable complexity through the systematic division of the gate structure.
Solution Approach 2:
The first and second buried gates are connected through a gate connection structure, merging them into a unified transmission gate system. This combination allows the separate gates to work together synergistically, achieving reduced parasitic capacitance and improved conversion gain while presenting a single functional unit to the rest of the circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces noise and parasitic capacitance, enhancing the image sensor's conversion gain and overall image quality by preventing dopant-induced trap sites and minimizing the number of contacts and wiring length.
Implementation Method 1
The image sensor converts an optical image signal into an electrical signal
Data Source
AI summary
An image sensor including a substrate having a pixel region, a floating diffusion region in the pixel region of the substrate, a plurality of photoelectric conversion regions around the floating diffusion region in the substrate, a plurality of transmission gates adjacent to the plurality of photoelectric conversion regions, respectively, each including a first buried gate extending to the inside of the substrate, a second buried gate apart from the first buried gate and extending to the inside of the substrate, and a gate connection between the first buried gate and the second buried gate, and a plurality of spacers each on at least parts of side walls of each of the plurality of transmission gates, wherein each of the plurality of spacers is between the side walls of each of the plurality of transmission gates and the floating diffusion region in a plan view.