Buried Gate Transistor Pixel for Rear-Irradiation Imaging
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Solution Overview
Problem
Existing CMOS solid state imaging devices face challenges in achieving a global shutter function and refining pixel structure, particularly in applying surface irradiation type configurations to rear surface irradiation types, where the photodiode and memory are formed on the same flat surface, limiting the expansion of the photodiode area and pixel refinement.
Innovation Solution
A solid state imaging device with a pixel structure that includes a photoelectric conversion unit, a charge accumulation unit, a first transfer transistor with a gate electrode buried up to a predetermined depth in the semiconductor substrate, and a charge holding unit, where the charge accumulation unit is formed in a longitudinally long shape along the side wall of the first transfer transistor, enabling efficient charge transfer and shielding from light.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the photodiode and memory are formed on the same flat surface, then the device structure is simple, but it is difficult to increase the area of the photodiode and refine the pixel
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration. The photodiode is formed in the depth direction (third dimension) of the semiconductor substrate, while the memory is positioned on the surface plane. This dimensional separation allows both components to coexist without spatial conflict, enabling increased photodiode area and pixel refinement while maintaining structural simplicity.
2Object-affected harmful factors
If a surface irradiation type is adopted with a short distance between the charge accumulation unit and light shielding film, then light shielding is effective, but the structure cannot be applied to rear surface irradiation type
Solution Approach 1:
The patent positions the charge accumulation unit in the depth direction rather than on the surface plane, creating spatial separation from the light shielding film. This three-dimensional arrangement allows the structure to function effectively in rear surface irradiation type devices, where light enters from the back of the substrate, while maintaining adequate light shielding performance.
Solution Approach 2:
The patent introduces a light shielding film positioned between the charge accumulation unit and the light incident surface. This intermediary element blocks stray light from reaching the charge accumulation unit, preventing false signals while allowing the device to accommodate rear surface irradiation architecture.
3Manufacturing precision
If the charge accumulation unit is formed in a longitudinally long shape along the side wall of the gate electrode, then pixel refinement is achieved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the charge accumulation unit with the side wall of the gate electrode of the first transfer transistor, forming an integrated structure. The charge accumulation unit is positioned to overlap with the gate electrode in the depth direction and extend along its side wall, combining two functional elements into a unified structure that achieves pixel refinement without proportionally increasing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration allows for the refinement of pixels and enables the device to be applied to rear surface irradiation types, improving image fidelity by reducing distortion and enhancing light shielding capabilities.
Implementation Method 1
a photoelectric conversion unit that generates a charge according to an amount of light which is received, and accumulates the charge
Data Source
AI summary
There is provided a solid state imaging device including a pixel including a photoelectric conversion unit that generates and accumulates a charge according to a received light amount, a charge accumulation unit that accumulates the generated charge, a first transfer transistor that transfers the charge of the photoelectric conversion unit to the charge accumulation unit, a charge holding unit that holds the charge to read out as a signal, and a second transfer transistor that transfers the charge of the charge accumulation unit to the charge holding unit, in which a gate electrode of the first transfer transistor is formed to be buried up to a predetermined depth from a semiconductor substrate interface, and the charge accumulation unit is formed in a longitudinally long shape to be extended in a depth direction along a side wall of the gate electrode of the first transfer transistor to be buried therein.