Buried Source Follower Gate Layout for Lower RTS Noise

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Solution Overview

Problem

Current image sensors face challenges in reducing random telegraph signal (RTS) noise, which affects the performance and reliability of image capture.

Innovation Solution

The design includes a source follower transistor with a buried portion that protrudes below the body portion into the substrate, positioned closer to the drain region than the source region, optimizing the distance and depth of the recess region to enhance the effective channel length and reduce noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the source follower gate pattern is designed with a buried portion protruding into the substrate, then the RTS noise property is improved, but the device complexity increases

Engineering Contradiction:
ImproveRTS noise propertyVSAvoidgate pattern structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The source follower gate pattern is extended from a two-dimensional planar structure into the third dimension by adding a buried portion that protrudes below the body portion into the substrate. This vertical extension creates a three-dimensional gate structure that increases the effective channel length and improves RTS noise properties without requiring additional planar space.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate pattern is divided into two distinct segments: a body portion that remains on the substrate surface and a buried portion that extends into the substrate. This segmentation allows each portion to serve specific functions - the body portion for standard gate control and the buried portion for noise reduction - while maintaining manufacturing feasibility through separate formation processes.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the buried portion is positioned closer to the drain region, then the RTS noise property is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
ImproveRTS noise propertyVSAvoidburied portion positioning
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The design specifies a quantitative parameter range for the buried portion position, defining it as being located between 0.1 to 0.5 times the gate length from the first side surface. This parameterization transforms the qualitative requirement of 'closer to drain' into a measurable and controllable manufacturing specification, enabling precise control of the noise reduction effect while maintaining fabrication feasibility.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the effective channel length is increased through the buried portion, then the RTS noise property is improved, but the area of the active region increases

Engineering Contradiction:
ImproveRTS noise propertyVSAvoidactive region area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The effective channel length is extended by utilizing the vertical dimension through the buried portion that protrudes into the substrate. This approach increases the channel length without proportionally increasing the planar area of the active region, as the additional channel length is achieved through depth rather than surface expansion, thereby improving noise properties with minimal area penalty.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP4376083A1Image sensor
Publication Date: 2024.05.29 SAMSUNG ELECTRONICS CO LTD
  • EP4376083A1 patent drawingFigure 1
  • EP4376083A1 patent drawingFigure 2
  • EP4376083A1 patent drawingFigure 3

AI summary

An image sensor includes a substrate including an active region with source and drain regions, a source follower gate pattern on the active region, the drain and source regions being adjacent to first and second side surfaces of the source follower gate pattern, respectively, and a gate insulating layer between the active region and the source follower gate pattern. An upper portion of the active region includes a recess region, and the source follower gate pattern includes a body portion on the active region and a buried portion provided in the recess region and protruding below the body portion. A distance between the first and second side surfaces is a first length, and a distance between a center of the buried portion and the first side surface is a second length. The second length is greater than or equal to 0.1 times the first length and is less than 0.5 times the first length.