Buried Gate Silicide Protrusions for Contact Resistance

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Solution Overview

Problem

Semiconductor devices with buried gates face increased contact resistance due to the small contact area between impurity regions and contact plugs, which limits their performance and integration density.

Innovation Solution

The formation of silicide layers between the impurity regions and contact plugs, which act as ohmic contacts to reduce contact resistance, and the use of buried gates with silicide layers protruding above the substrate to increase the contact area and stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If buried gates are used to increase integration density, then device integration density is improved, but contact resistance increases due to small contact area

Engineering Contradiction:
Improveintegration densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The contact structure transitions from a planar two-dimensional contact to a three-dimensional protruding contact. The silicide layer protrudes upward from the substrate surface between the buried gates, creating a vertical dimension that increases the contact area without increasing the lateral footprint, thus maintaining high integration density while reducing contact resistance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

A silicide layer is introduced as an intermediary material between the impurity region and the contact plug. This silicide layer serves as a mediator that provides both low resistance and mechanical stability, resolving the contradiction between achieving low contact resistance and maintaining small contact area in high-density integrated devices

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If contact area is increased to reduce contact resistance, then contact resistance is reduced, but device area increases reducing integration density

Engineering Contradiction:
Improvecontact resistanceVSAvoidintegration density
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The contact structure utilizes the vertical dimension by protruding upward from the substrate surface. This allows the contact area to be increased in the vertical direction without consuming additional lateral space, thereby reducing contact resistance while maintaining high integration density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional contact structures are used in buried gate devices, then fabrication is simpler, but contact stability and process margin are reduced

Engineering Contradiction:
Improvefabrication simplicityVSAvoidcontact stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The silicide layer acts as an intermediary that enhances contact stability and process margin. It provides a robust interface between the impurity region and contact plug, improving mechanical stability and electrical contact reliability while maintaining compatibility with existing fabrication processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The silicide layers effectively reduce contact resistance and enhance the stability and process margin of semiconductor devices, facilitating easier fabrication and improved performance, especially in high-integration density devices.

Implementation Method 1

The silicide layers are formed on the protruded portions to increase a contact area between the substrate and contact holes, thereby reducing contact resistance

Methodology Applied
Scientific EffectOhmic contact: Conduction (electrical)

Implementation Method 2

forming impurity regions in the active regions between the buried gates by implanting ion impurities to the substrate

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Data Source

PatentUS9368356B2Method for fabricating electronic devices having semiconductor memory unit
Publication Date: 2016.06.14 SK HYNIX INC
  • US9368356B2 patent drawing
  • US9368356B2 patent drawing
  • US9368356B2 patent drawing

AI summary

Devices and methods based on disclosed technology include, among others, an electronic device including silicide layers capable of effectively reducing contact resistance in the electronic device including buried gates and a method for fabricating the electronic device. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate and silicide layers formed over the substrate between the buried gates and protruding upwardly from the buried gates.