Buried Power Rail Etch-Stop Layout for Backside Power Routing
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Solution Overview
Problem
As devices are scaled down and placed closer together, forming buried power rails between cell spaces becomes challenging due to the difficulty in organizing power and routing effectively.
Innovation Solution
A method of forming integrated chips with buried power rails involves creating a stack of layers, replacing a sacrificial layer with an etch stop layer, etching a trench in the substrate, and forming a conductive line within the trench to connect the buried power rail to the frontside device, allowing for a backside power distribution network.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If devices are scaled down and placed closer together, then device density and integration are improved, but forming buried power rails between cell spaces becomes challenging
Solution Approach 1:
The patent transitions from planar power rail formation to three-dimensional stacked architecture, where power rails are formed in vertical trenches beneath devices rather than horizontally between cells. This dimensional change allows power distribution in high-density layouts where traditional lateral routing is insufficient.
Solution Approach 2:
Etch stop layers are deposited and patterned before substrate removal and trench formation. This preliminary structuring defines the precise locations and depths of buried power rails in advance, enabling reliable power distribution even as devices are scaled down and placed closer together.
2Adaptability or versatility
If substrate is removed to expose backside for power distribution, then backside power distribution network is enabled, but risk of over-etching and shorting to frontside devices increases
Solution Approach 1:
Etch stop layers are formed prior to substrate removal to pre-establish protective barriers at specific depths. These layers prevent over-etching during backside processing, ensuring that trenches stop at the correct depth and do not penetrate through to short frontside devices.
Solution Approach 2:
Etch stop layers act as intermediary protective barriers between the aggressive etching process and the sensitive frontside devices. These layers mediate the etching process by providing a controlled stop point, allowing substrate removal while protecting underlying structures from damage or shorting.
3Reliability
If etch stop layers are used to prevent over-etching, then reliability is improved, but manufacturing process complexity increases
Solution Approach 1:
The etch stop layers serve multiple functions: they prevent over-etching during substrate removal, define the depth of buried power rail trenches, and provide structural reference planes for subsequent processing steps. This multi-functionality reduces the need for separate protective layers, offsetting the added complexity.
Solution Approach 2:
The patent employs selective etching parameters and material compositions for etch stop layers (e.g., silicon nitride, silicon oxide) that provide high etch selectivity. By optimizing these parameters, the layers effectively prevent over-etching while minimizing the number of additional process steps required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient power distribution and routing by forming buried power rails with a width greater than the inter-device distance, ensuring reliable electrical connections without shorting to frontside devices, and facilitating a backside power distribution network.
Implementation Method 1
The first sacrificial layer is replaced with a first etch stop layer. The substrate-side of the stack of layers is etched to form a trench, stopping on the first etch stop layer.
Data Source
AI summary
Integrated chips and methods of forming the same include forming a stack of layers, including a device stack above a first sacrificial layer, above a substrate. The first sacrificial layer is replaced with a first etch stop layer. The substrate is removed, exposing a substrate-side of the stack of layers. The substrate-side of the stack of layers is etched to form a trench, stopping on the first etch stop layer. A conductive line is formed in the trench.


