Buried Connection Tower Layout for Low-Resistance ESD Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Miniaturization of integrated circuits has increased their susceptibility to electrostatic discharge (ESD) due to thinner dielectric thicknesses and lower dielectric breakdown voltages, leading to potential electronic circuit damage.

Innovation Solution

Incorporating a buried connection tower that connects the input/output pad to both the functional circuitry and an ESD clamp circuit, reducing the resistance in the ESD path and allowing harmless discharge of electrostatic energy, thereby protecting the functional circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If miniaturization is pursued to reduce device size and power consumption, then device functionality and speed are improved, but susceptibility to electrostatic discharge increases due to thinner dielectric thicknesses and lower breakdown voltages

Engineering Contradiction:
Improvedevice sizeVSAvoidsusceptibility to electrostatic discharge
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent segments the connection path by introducing a dedicated ESD clamp circuit as a separate functional block that is selectively activated during ESD events. The connection tower is divided into functional circuitry connection and ESD clamp circuit connection, allowing independent optimization of each path. This segmentation enables the device to maintain miniaturization benefits while adding specialized ESD protection functionality without proportionally increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary ESD clamp circuit that acts as a mediator between the input/output pad and the internal circuitry. This clamp circuit provides a controlled discharge path for ESD events, intercepting harmful electrostatic energy before it reaches the sensitive functional circuitry. The intermediary structure allows the miniaturized device to handle ESD events safely without requiring larger protective components.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ESD protection is enhanced by adding protection circuits, then reliability against electrostatic discharge is improved, but device complexity increases

Engineering Contradiction:
Improveprotection against electrostatic dischargeVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ESD protection functionality with the existing connection infrastructure by utilizing the connection tower structure for both functional circuitry connection and ESD clamp circuit connection. The shared connection tower and selective activation mechanism combine multiple functions into a unified structure, reducing the need for separate dedicated ESD protection paths and thereby minimizing additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The connection tower structure is designed with multi-functionality, serving both as a connection path to functional circuitry and as a connection path to the ESD clamp circuit. This universal structure allows the same physical infrastructure to support multiple functions, reducing the need for additional specialized components and minimizing the increase in device complexity while providing robust ESD protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Volume of moving object

If dielectric thickness is reduced to enable miniaturization, then device size and power consumption are improved, but dielectric breakdown voltage decreases leading to higher ESD susceptibility

Engineering Contradiction:
Improvedevice sizeVSAvoiddielectric breakdown voltage
Core Design Contradiction:
Volume of moving objectVSStrength

Solution Approach 1:

The patent applies preliminary anti-action by proactively introducing the ESD clamp circuit that anticipates and counteracts the weakened dielectric's vulnerability to ESD events. The clamp circuit is positioned and configured to activate before ESD damage can occur, providing preemptive protection that compensates for the reduced dielectric strength. This allows the device to maintain thin dielectric layers for miniaturization while pre-established protection mechanisms prevent ESD-related failures.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces the resistance for electrostatic discharge, preventing damage to the internal circuitry by providing a lower resistance path for ESD to be harmlessly discharged, thus enhancing the protection of the integrated circuit from electrostatic events.

Implementation Method 1

the first connection tower connects to an input/output pad and to a first electrostatic discharge (ESD) clamp circuit. By utilizing the first connection tower common to both the first ESD clamp circuit and the functional circuit, a resistance presented in the ESD path is significantly reduced thereby allowing for harmless ESD discharging

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Data Source

PatentUS12148746B2Integrated circuit and method of manufacturing same
Publication Date: 2024.11.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12148746B2 patent drawing
  • US12148746B2 patent drawing
  • US12148746B2 patent drawing

AI summary

An integrated circuit (IC) device includes a semiconductor substrate, a first connection tower, and one or more first front side conductors and one or more first front side metal vias. The semiconductor substrate includes a first semiconductor substrate segment having first functional circuitry and a second semiconductor substrate segment having a first electrostatic discharge (ESD) clamp circuit. The first connection tower connects to an input/output pad. The one or more first front side conductors and one or more first front side metal vias connect the first buried connection tower to the first functional circuitry in the first semiconductor substrate segment and to the first ESD clamp circuit in the second semiconductor substrate segment.