Buried Tri-Gate Fin Vertical Gate Structure for CMOS Image Sensors
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Solution Overview
Problem
CMOS image sensors face challenges in reducing pixel size due to limitations in effective full well capacity (FWC) of photodiodes, leading to degraded image quality and slow electron transfer efficiency, particularly in small pixel units where electrons recombine easily and require longer transfer times.
Innovation Solution
A buried tri-gate fin vertical gate structure is introduced, featuring a transfer transistor with a vertical gate extending into an epitaxial layer, a photodiode located laterally, and a reset transistor with N+-doped regions forming a floating diffusion node, enhancing electron transfer efficiency through a three-dimensional channel structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If pixel dimensions are reduced to increase pixel unit density, then more pixels can be accommodated, but electron transfer efficiency deteriorates and recombination increases
Solution Approach 1:
The patent transitions from a conventional two-dimensional planar channel structure to a three-dimensional vertical gate structure. The vertical gate extends downward into the photodiode, creating a three-dimensional channel that allows electrons to transfer vertically rather than horizontally across the surface. This dimensional change enables efficient electron collection even in reduced-pixel-size configurations by providing a direct vertical transfer path from the photodiode depletion region to the floating diffusion node.
2Productivity
If a vertical gate structure is introduced to improve electron transfer speed, then electron transfer efficiency increases, but device complexity increases
Solution Approach 1:
The patent merges the transfer transistor gate with the vertical channel structure by extending the gate downward into the photodiode region. This integration creates a unified vertical gate structure that combines the functions of charge transfer and channel formation, eliminating the need for separate surface-level gate and channel structures. The merged structure reduces device complexity while achieving three-dimensional electron transfer.
Solution Approach 2:
The vertical gate extends in the vertical dimension into the photodiode, transforming the conventional planar gate structure into a three-dimensional structure. This dimensional extension allows the gate to control electron transfer directly at the photodiode interface, improving transfer speed without requiring additional lateral space or complex multi-layer routing.
3Quantity of substance
If electrons transfer through the entire junction region in a planar channel, then all electrons can be collected, but recombination with holes increases and extraction efficiency decreases
Solution Approach 1:
The vertical gate structure creates a three-dimensional channel that provides a direct vertical pathway for electron transfer from the photodiode depletion region to the floating diffusion node. This vertical path is significantly shorter than the horizontal path required in planar channels, reducing the distance electrons must travel through the junction region. Consequently, recombination losses are minimized while maintaining complete electron collection.
Solution Approach 2:
The vertical gate structure acts as an intermediary structure that facilitates direct electron transfer between the photodiode and floating diffusion node. By providing this intermediate vertical channel, electrons can bypass the lengthy horizontal traversal through the junction region, reducing exposure to holes and minimizing recombination while ensuring all photo-generated electrons are efficiently extracted.
Data Source
AI summary
The present application provides a buried tri-gate fin vertical gate structure. Which includes a transfer transistor on an epitaxial layer; a photodiode in the epitaxial layer at one side of the transfer transistor. A reset transistor on the epi-layer includes N+ regions at both sides of its gate, one of the N+ regions forms a floating diffusion node. The bottom of the fin vertical gate protrudes into the epitaxial layer with a number of vertical portions. Thus, increased surface areas enhance charge motion at the bottom, combining large-area transfer at an upper layer by the vertical gate and quick transfer at the bottom by the FINFET, thereby improving photo response.