Buried Via Technology for 3D IC Vertical Interconnects
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Solution Overview
Problem
Three-dimensional integrated circuit technologies face challenges with through vias, which create exclusion zones, block routing streets, and interrupt power routing, making it difficult to achieve high-density vertical interconnects compatible with two-dimensional circuit technologies.
Innovation Solution
The implementation of buried via technology, where metal layers are embedded in dielectric materials and connected using metal bonds, allowing for vertical interconnects between stacked active circuit layers without penetrating the wafer, thus minimizing exclusion zones and maintaining compatibility with 2D IC technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through vias are used for vertical interconnects, then electrical connection between metal layers is achieved, but exclusion zones are created that interrupt routing in all metal layers
Solution Approach 1:
The through via is segmented into multiple parts: a first via portion in the first die, a second via portion in the second die, and an intermediate conductive structure. This segmentation allows each portion to be optimized independently and reduces the continuous exclusion zone effect across the entire interconnect path.
Solution Approach 2:
An intermediate conductive structure (such as a bump or pad) is introduced between the two via portions to bridge the connection. This intermediary element allows the vias to be discontinuous while maintaining electrical connectivity, thereby reducing the exclusion zone impact on routing streets.
2Device complexity
If through vias penetrate the wafer to connect metal layers, then vertical interconnect is established, but routing streets are blocked in both dimensions on all metal layers
Solution Approach 1:
The continuous through via is divided into separate via portions located in different dies, with the intermediate conductive structure serving as a connection point. This segmentation allows routing streets to bypass the via locations in each individual die, improving routing flexibility while maintaining vertical interconnect functionality.
3Strength
If landing pads are used to support through vias, then mechanical support is provided, but power routing streets are blocked on the top metal layer
Solution Approach 1:
The mechanical support function is segmented from the electrical connection function. The intermediate conductive structure (bump or pad) provides mechanical support locally, while the via portions provide electrical connection. This allows power routing streets to be positioned away from the via locations without compromising structural integrity.
Solution Approach 2:
The support structure is moved to a different dimensional location - the intermediate conductive structure sits at the interface between dies rather than at the top surface, allowing power routing on the top metal layer to proceed unblocked while maintaining mechanical support through the die-to-die bonding interface.
4Productivity
If through vias are used to achieve high density vertical interconnects, then interconnect density is improved, but compatibility with two-dimensional circuit technologies is reduced
Solution Approach 1:
The interconnect structure is segmented into standard planar via portions that are compatible with 2D CMOS technology, combined with intermediate conductive structures that enable 3D stacking. This allows each die to be manufactured using conventional 2D processes while achieving high-density vertical interconnects through the stacked architecture.
Data Source
AI summary
A three dimensional integrated circuit and method for making the same. The three dimensional integrated circuit has a first and a second active circuit layers with a first metal layer and a second metal layer, respectively. The metal layers are connected by metal inside a buried via. The fabrication method includes etching a via in the first active circuit layer to expose the first metal layer without penetrating the first metal layer, depositing metal inside the via, the metal inside the via being in contact with the first metal layer, and bonding the second active circuit layer to the first active circuit layer using a metal bond that connects the metal inside the via to the second metal layer of the second active circuit layer.