Burst-Mode Clock Recovery Fast Locking After Stall Transitions

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Solution Overview

Problem

Conventional clock data recovery devices require considerable time to relock phase and frequency when transitioning from a stall mode to burst mode, affecting speed and efficiency.

Innovation Solution

A clock data recovery device and method that includes a clock data recovery loop, frequency tracking loop, and a fast-locking unit, which generates a fast-locking signal to quickly lock the recovery clock signal by adjusting the phase of the sampling clock signal based on phase-leading or phase-lag information, allowing for rapid alignment with the data signal's temporal position upon retransmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the clock data recovery device uses conventional phase and frequency relocking method, then the device can recover from stall mode, but the relocking process takes considerable time and lowers the speed

Engineering Contradiction:
Improvephase and frequency locking capabilityVSAvoidrelocking time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by maintaining the charge pump in a working state during stall mode instead of turning it off. This preliminary preparation allows the phase detector and charge pump to immediately continue tracking phase and frequency differences when data transmission resumes, eliminating the need for time-consuming relocking procedures while maintaining reliable phase and frequency synchronization

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the clock data recovery device enters stall mode to save power, then energy consumption is reduced, but the device requires considerable time to relock phase and frequency upon resuming operation

Engineering Contradiction:
Improvepower consumption during stall modeVSAvoidspeed of phase and frequency locking
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent applies dynamics by making the charge pump's operational state dynamic rather than static. The charge pump transitions between different operational modes (fully active, reduced activity, or standby) based on the actual data transmission status and phase-lock conditions, allowing the system to optimize power consumption while maintaining the capability for rapid phase and frequency relocking when needed

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9806879B2Burst mode clock data recovery device and method thereof
Publication Date: 2017.10.31 REALTEK SEMICON CORP
  • US9806879B2 patent drawing
  • US9806879B2 patent drawing
  • US9806879B2 patent drawing

AI summary

A burst mode clock data recovery device includes a clock data recovery loop, a frequency tracking loop, a frequency tracking loop, and a fast-locking unit. The clock data recovery loop receives a sampling clock signal and a data signal and uses the sampling clock signal to lock the data signal to generate a recovery clock signal. The frequency tracking loop tracks a frequency of the recovery clock signal to generate a frequency detection signal associated with the recovery clock signal. The phase lock loop receives the frequency detection signal and locks the recovery clock signal in a reference clock. The fast-locking unit generates a fast-locking signal according to the recovery clock signal and a first phase detection signal to allow the clock data recovery loop to quickly lock the data signal after the transition from a stall mode to the burst mode.