Burst-Error Tolerant Decoder Using Contiguous Erasure Patterns
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Solution Overview
Problem
Conventional error correction techniques, such as Decision Feedback Equalization (DFE) and Forward Error Correction (FEC), are inadequate in addressing burst errors and bit-errors at high transmission rates in serial communication systems, particularly in SerDes interfaces, due to assumptions of error-free previous bits and limitations in correcting symbol errors.
Innovation Solution
The implementation of burst-error tolerant decoders that test all possible contiguous erasure patterns in a FEC block, using selection circuitry to identify a correction mask that best matches the burst-error output, combining erasure techniques with block encoding to correct errors without external indications of error locations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error correction techniques (DFE, FEC) are used, then the system operates with simple error correction logic, but the system cannot effectively correct burst errors at high transmission rates
Solution Approach 1:
The patent segments the error correction process into multiple independent modules: a first error correcting circuitry that processes candidate correction patterns, a selection circuitry that evaluates multiple corrections, and a second error correcting circuitry that applies the selected correction. This segmentation allows each module to specialize in specific aspects of burst error correction, achieving high reliability without requiring a complete redesign of the error correction system.
Solution Approach 2:
The patent performs preliminary error correction by generating multiple candidate corrections before final selection. The first error correcting circuitry pre-processes the received block using various candidate correction patterns, and the selection circuitry evaluates these candidates before the second error correcting circuitry applies the final correction. This preliminary action enables the system to handle burst errors effectively by preparing multiple potential solutions in advance.
2Reliability
If the decoder tests all possible contiguous erasure patterns, then the burst error correction capability is enhanced, but the device complexity increases
Solution Approach 1:
The patent divides the complex task of testing all contiguous erasure patterns across multiple specialized circuitry blocks. Each block handles specific candidate correction patterns in parallel, reducing the computational burden on any single component. The selection circuitry then evaluates these pre-processed candidates, distributing the complexity across the system architecture rather than concentrating it in one complex decoder.
Solution Approach 2:
The patent applies partial correction by focusing on contiguous erasure patterns specifically, rather than attempting to correct all possible error types. The system tests candidate correction patterns for contiguous patterns and selects the best match, performing excessive action by evaluating multiple candidates beyond what a single conventional decoder would attempt, thereby achieving high burst error tolerance with manageable complexity.
3Measurement precision
If multiple candidate corrections are generated and evaluated, then the error correction accuracy is improved, but the processing time increases
Solution Approach 1:
The patent implements periodic evaluation of candidate corrections through a structured selection process. The selection circuitry systematically evaluates multiple candidate corrections in a defined sequence, comparing error lengths and selecting the best match periodically. This periodic action ensures thorough evaluation for high accuracy while maintaining a predictable processing rhythm that limits decoding delay.
Solution Approach 2:
The patent applies local quality by focusing correction efforts on the most likely error patterns first. The selection circuitry compares error lengths of candidate corrections and prioritizes evaluations based on local characteristics of the received block. This localized approach to evaluating candidates improves accuracy by concentrating processing on the most promising corrections while reducing overall processing time.
Data Source
AI summary
Disclosed embodiments of the present disclosure relate, generally, to systems, methods, and devices for correction of burst-errors induced during transmission of encoded blocks of information. Some embodiments relate to decoders configured to test candidate corrections on a received block of information and select a candidate correction that best fits the characteristics of burst-errors expected for a type of transmission scheme. Such tested candidate corrections may be selected based on characteristics of burst-errors typically induced for a type of transmission scheme. Some embodiments relate to decoders configured to test candidate corrections for correcting burst-errors and perform standard error correcting techniques such as Reed-Solomon forward error correction techniques. Some embodiments relate to systems, such as serial/deserializer interfaces, that incorporate such decoders.