Burst Read Transaction Reordering via Transfer Identifiers

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Solution Overview

Problem

The existing systems face constraints in processing burst read transactions due to the need for reorder buffers at intermediate nodes, which limits the size of burst transactions and reduces performance, as they must ensure data items are returned in a predetermined order, often requiring significant reorder buffer overhead or serializing read transactions to avoid this need.

Innovation Solution

The solution involves a mechanism where the slave device generates transfer identifiers for each data transfer, allowing the master device to buffer and reorder data items locally, eliminating the need for intermediate reorder buffers by using transfer identifiers to ensure data items are provided to processing circuitry in the correct order, regardless of their transfer order.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If reorder buffers are used at intermediate nodes to ensure data items are returned in predetermined order, then response ordering requirement is met, but device complexity and buffer overhead increase significantly

Engineering Contradiction:
Improveresponse orderingVSAvoidreorder buffer overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the reordering function from intermediate nodes and relocates it to the master device. The slave device no longer needs to buffer and reorder data items, instead it transfers them in the order they become available. The master device receives transfer identifiers with each data item and performs the reordering locally, eliminating the need for complex reorder buffers at intermediate nodes while maintaining response ordering requirements.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces transfer identifiers as an intermediary mechanism to enable reordering at the master device. Each data item is tagged with a transfer identifier that indicates its position in the expected order. The master device uses these identifiers to reorder data items locally without requiring intermediate nodes to maintain large reorder buffers, thus reducing overall system complexity while preserving ordering guarantees.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If burst size is limited to small numbers of beats to reduce reorder buffer requirements, then device complexity is reduced, but productivity decreases due to inability to utilize larger burst transactions

Engineering Contradiction:
Improvereorder buffer requirementsVSAvoidburst transaction performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent removes the reordering burden from intermediate nodes and places it at the master device, which has access to processing circuitry and buffer resources. This extraction allows slave devices to support large burst transactions without being constrained by intermediate node buffer capacities, enabling full utilization of burst read performance while keeping intermediate node complexity low.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the dimension of reordering from spatial (distributed reorder buffers at intermediate nodes) to centralized (single reorder buffer at master device). This dimensional shift allows the system to support larger burst sizes because the reordering capacity is concentrated at the master device which has direct access to the processing circuitry and can allocate buffer space dynamically based on transaction requirements.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Device complexity

If read transactions are serialised to avoid reorder buffers, then device complexity is reduced, but productivity deteriorates due to poor performance

Engineering Contradiction:
Improvereorder buffer eliminationVSAvoidsystem performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent extracts the reordering function from the data path and implements it at the master device using transfer identifiers. This allows slave devices and intermediate nodes to operate in parallel without serialization, as each node can transfer data items as soon as they are available. The master device reorders the incoming data items using the transfer identifiers, maintaining parallel operation throughout the system while eliminating the need for serialization.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical serialization approach with an identifier-based reordering mechanism. Instead of serializing transactions to avoid reordering needs, the system allows parallel data transfers and uses transfer identifiers to track and reorder data items at the master device. This substitution enables concurrent operation while maintaining ordering guarantees, significantly improving system performance compared to serialized approaches.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS10628355B2Apparatus and method for processing burst read transactions
Publication Date: 2020.04.21 ARM LTD
  • US10628355B2 patent drawing
  • US10628355B2 patent drawing
  • US10628355B2 patent drawing

AI summary

An apparatus and method are provided for processing burst read transactions. The apparatus has a master device and a slave device coupled to the master device via a connection medium. The master device comprises processing circuitry for initiating a burst read transaction that causes the master device to issue to the slave device, via the connection medium, an address transfer specifying a read address. The slave device is arranged to process the burst read transaction by causing a plurality of data items required by the burst read transaction to be obtained based on the read address specified by the address transfer, and by performing a plurality of data transfers over the connection medium in order to transfer the plurality of data items to the master device. The slave device has transfer identifier generation circuitry for generating, for each data transfer, a transfer identifier to be transmitted over the connection medium to identify which data item in the plurality of data items is being transferred by that data transfer. The master device has buffer circuitry to buffer data items received by the plurality of data transfers, and to employ the transfer identifier provided for each data transfer to cause the plurality of data items to be provided to the processing circuitry in a determined order irrespective of an order in which the data items are transferred to the master device via the plurality of data transfers. This can significantly reduce the overhead required to manage the supply of the data items to the processing circuitry in the required determined order.