Bus Arbitration Logic for BMC Resource Sharing
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Solution Overview
Problem
In storage systems, baseboard management controllers (BMCs) often face conflicts when trying to access shared resources simultaneously, leading to potential system lock-ups or performance issues due to the lack of support for a master-slave environment.
Innovation Solution
A method is implemented where a processor from one controller requests access to a shared bus attached to a device, waits for a positive response from another controller, accesses the bus for less than a first timeout period, resets the timer if access is not complete within a second timeout period, and releases the bus when access is complete or the second timeout period has been reached, ensuring fair and efficient access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If BMCs access shared resources simultaneously without master-slave environment support, then system flexibility and functionality are improved, but system stability and reliability deteriorate due to conflicts and lock-ups
Solution Approach 1:
The patent introduces a mediator mechanism (bus arbitration logic) that intermediates between multiple BMCs and shared resources. This mediator coordinates access requests, grants permission to one BMC at a time, and manages the master-slave relationships dynamically, thereby preventing conflicts while maintaining system flexibility
Solution Approach 2:
The system implements dynamic master-slave role assignment where BMCs can transition between master and slave states based on arbitration outcomes. This dynamic role switching allows the system to adapt to different operational scenarios while maintaining stable access control through defined protocols
2Speed
If BMCs access shared bus without coordinated control, then access speed and responsiveness are improved, but resource contention and system performance deteriorate
Solution Approach 1:
The system performs preliminary actions by establishing arbitration protocols and access rules before BMCs attempt to access shared resources. This pre-coordination ensures that when access requests occur, they follow predefined patterns that prevent contention, maintaining both speed and overall system performance
Solution Approach 2:
The bus arbitration mechanism operates periodically, granting access rights in structured time intervals to different BMCs. This periodic access pattern ensures fair resource distribution and prevents any single BMC from monopolizing the bus, thereby maintaining system-wide performance while allowing rapid access during granted periods
Data Source
AI summary
Methods and systems for sharing access to a computer resource accessible by a bus between two controllers are provided. For example, a machine implemented method of sharing access to computer resources includes requesting access to a bus from a processor of a first controller to access a device shared with a processor of a second controller; waiting for a positive response from the second controller; when the positive response is received, accessing the bus for less than a first timeout period; resetting a timer before the timer reaches the first timeout period to extend access to the bus, when access is not complete and a total access time is less than a second timeout period; and releasing the bus when access is complete or the second timeout period has been reached.