Electric Digital Data Processing TRIZ Cases
- Vertically Stacked High-Bandwidth Storage for In-Package Data Access
This case integrates non-volatile HBS with HBM and processing units for faster data access and lower power use.
- USB Routing IC With Multiple Upstream Ports for Shared Resources
Multiplexers and switching circuits route two USB hosts to shared downstream and video resources through selectable paths.
- CXL-over-Ethernet Bridge for Multi-Rack Memory Access
A COE station bridges CXL and Ethernet with virtual queues, enabling shared memory resources beyond a single rack.
- PCIe Data Transmission Switching Register and DMA by Packet Size
A threshold selects register-based transfer for small PCIe packets and DMA for large ones, improving bandwidth use and host stability.
- CAM-SRAM Hierarchical Routing Lookup for Memory-Constrained Networks
A hierarchical CAM-SRAM lookup maps destination IP segments to subnet routing data, reducing memory needs for packet forwarding.
- Shared Device Bandwidth Allocation for CXL Host QoS
A PBMBA controller dynamically assigns CXL shared-memory bandwidth to host workloads, reducing bottlenecks and improving resource use.
- Embedded Network-on-Chip Routing for 2.5D and 3D IC Connectivity
Configurable NOCs place sources and sinks across IC regions, enabling scalable 2.5D and 3D data routing with less congestion.
- Round Robin Bus Arbitration Using Grant History for Fair Access
A combinational arbitration scheme uses request, grant history, and circular-shift vectors to limit domination and improve throughput.
- USB Sideband I2C Tunneling via SATL Address Translation
A SATL circuit routes low-speed I2C through USB 4.0 sideband channels, reducing power use and extra pins.
- USB Port CAN Detection Using Pull-Up Voltage Sensing
Detect USB or CAN peripherals through pull-up voltage sensing.
- Locality-Based Data Fabric Routing to Reduce Memory Latency
Separate local and remote request queues bypass crossbar delays for local memory access and improve processing efficiency.
- Hot I2C–I3C Protocol Transition by Slave-Address Detection
A stored address table selects I2C or I3C before transfer, supporting hybrid buses without reset, handshake, or wait periods.
- Communication Receiver for ECU Service Protocol Offloading
A dedicated receiver handles service discovery and protocol conversion, reducing ECU processing load while streaming small or large data.
- Integrated Circuit Timing Signaling for Multi-Drop Bus Arbitration Delays
This case embeds arbitration delay data in packets so receiving circuits can retime expectations and coordinate periodic events.
- Many-Core Processing With Stacked Compute-Memory Direct Connections
This case uses direct compute-to-storage core links to reduce transmission pressure, shorten paths, and limit chip area.