Semiconductor Bus Arbitration via Transfer-Aware Priority Generation

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Solution Overview

Problem

In semiconductor devices with multiple bus masters and slaves, existing arbitration methods fail to efficiently manage access permissions based on transfer amounts, leading to inefficient priority control and increased circuit complexity.

Innovation Solution

A semiconductor device with a priority generation circuit that determines priority based on transfer amounts between masters and slaves, using an arbitration circuit to manage access permissions, ensuring a constant amount of transfer with a specific slave while switching priorities based on threshold values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing arbitration methods are used to manage access permissions, then the arbitration function can be provided, but the priority control cannot be efficiently managed based on transfer amounts and the circuit complexity increases

Engineering Contradiction:
Improvepriority control efficiencyVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The priority generation circuit pre-calculates and generates priority values based on transfer amounts before arbitration is needed. This preliminary action allows the arbitration circuit to directly use the pre-generated priorities without performing complex calculations during arbitration, thereby improving priority control efficiency while keeping the arbitration circuit simple

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The arbitration system is segmented into two independent functional blocks: a priority generation circuit that handles priority calculation based on transfer amounts, and an arbitration circuit that handles access permission distribution. This segmentation allows each circuit to be optimized independently, improving overall efficiency while managing complexity through functional separation

Inventive Principle:
Principle #1Segmentation

2Productivity

If priority control is implemented without considering transfer amounts, then the arbitration can be performed, but the transfer amount management becomes inefficient

Engineering Contradiction:
Improvetransfer amount management efficiencyVSAvoidpriority control simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The priority generation circuit dynamically changes the priority parameter based on the transfer amount parameter. When the transfer amount exceeds a predetermined threshold, the priority value is automatically adjusted. This parameter-based control mechanism improves transfer amount management efficiency while maintaining operational simplicity through automatic threshold-based decision making

Inventive Principle:
Principle #35Parameter changes

3Productivity

If the priority is constantly increased for high transfer amounts, then the transfer efficiency improves, but the access fairness among multiple masters deteriorates

Engineering Contradiction:
Improvetransfer efficiencyVSAvoidaccess fairness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The priority value is made dynamic rather than fixed. The priority generation circuit automatically adjusts the priority level based on real-time transfer amount comparisons with thresholds. This dynamic adjustment ensures high transfer efficiency when needed while automatically restoring fairness when transfer amounts equalize, balancing both efficiency and fairness through adaptive behavior

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11816050B2Semiconductor device
Publication Date: 2023.11.14 RENESAS ELECTRONICS CORP
  • US11816050B2 patent drawing
  • US11816050B2 patent drawing
  • US11816050B2 patent drawing

AI summary

A semiconductor device is configured so that two or more master devices access a slave device via a bus. The semiconductor device includes: a priority generation circuit that generates a priority based on a transfer amount between a specific master device and a specific slave device; and an arbitration circuit that performs an arbitration based on the priority when competition of the accesses occurs.