Bus Bandwidth Smoothing via Delayed Notification Signals
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Solution Overview
Problem
In imaging systems, high-priority functional blocks consecutively outputting DMA transfer requests can lead to bus ownership not being passed to other blocks, causing stagnation of processes in low-priority functional blocks, and existing solutions may limit data transfer speed while attempting to smooth the common bus.
Innovation Solution
A data transfer device with a buffer unit, write control unit, read control unit, interface unit, and band-smoothing unit that delays notification signals to control the timing of data read from the buffer unit, allowing for sequential output of notification signals at predetermined intervals, ensuring that current transfer data is read from the buffer unit when previous data has been acknowledged, thus smoothing the common bus bandwidth without significantly reducing data transfer speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-priority functional blocks consecutively output DMA transfer requests, then data transfer efficiency is improved, but bus ownership does not pass to other functional blocks causing process stagnation
Solution Approach 1:
The band-smoothing unit delays notification signals to generate read control signals at predetermined time intervals, creating periodic action that ensures bus ownership passes to different functional blocks. This periodic reading mechanism prevents continuous bus occupation by high-priority blocks while maintaining efficient data transfer.
Solution Approach 2:
The buffer unit acts as an intermediary between the write control unit and read control unit. It temporarily stores transfer data and allows decoupled write and read operations, enabling the read control unit to access data at controlled intervals without blocking write operations, thus preventing process stagnation.
2Reliability
If notification signals are delayed to smooth bus bandwidth, then low-priority functional blocks can receive bus access, but data transfer speed is reduced
Solution Approach 1:
The band-smoothing unit dynamically adjusts the timing of read control signals based on the presence of transfer data in the buffer unit. When data is available, reading occurs at predetermined intervals to smooth the bus; when the buffer is empty, the system can respond more quickly, making the system adaptive and maintaining speed where possible while ensuring fairness when needed.
Solution Approach 2:
The write control unit writes transfer data to the buffer unit in advance before the read control unit needs to read it. This preliminary action allows the read control unit to read data at optimized intervals without blocking write operations, maintaining both bus access fairness and data transfer speed.
3Productivity
If DMA transfer requests are processed immediately, then data transfer speed is maintained, but bandwidth loss occurs due to consecutive requests from same block
Solution Approach 1:
The band-smoothing unit implements periodic reading of transfer data from the buffer unit at predetermined time intervals. This periodic action spreads out DMA transfer requests over time, preventing consecutive requests from the same block and reducing bandwidth loss while maintaining overall data transfer throughput.
Solution Approach 2:
The buffer unit continuously stores transfer data while the read control unit reads data at controlled intervals. This continuous availability of data in the buffer unit allows the system to maintain useful action (data transfer capability) without causing bandwidth loss through excessive consecutive requests.
Data Source
AI summary
A data transfer device includes a buffer unit temporarily storing transfer data to be transferred to a common bus, a write control unit writing input data as the transfer data to the buffer unit and outputs a notification signal, a read control unit reading the transfer data from the buffer unit, an interface unit transferring the transfer data to the common bus according to a predetermined bus protocol, and a band-smoothing unit which smoothes a band of the common bus by delaying the notification signal, generating a read control signal, and outputting the read control signal to the read control unit, wherein when previous transfer data which has been read from the buffer unit already exists and a DMA transfer receipt ACK responding to a DMA transfer request REQ is received by the interface unit, the read control unit reads current transfer data from the buffer unit.


