Bus Interface Power Derivation From Data Signals
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Solution Overview
Problem
Digital bus interface designs face challenges in minimizing the number of bus lines due to the need for multiple wires and pins, which is particularly problematic in modern communication systems where space is limited.
Innovation Solution
A bus interface system that uses a single bus line to transmit input data signals, where the slave bus controller includes power conversion circuitry to derive power from the input data signal, eliminating the need for additional bus lines for power and clock signals, and employs a PWM bus protocol to synchronize and decode data without requiring separate clock or address lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple bus lines are provided for power, clock, and data signals, then reliable communication and power supply are achieved, but the number of wires and pins increases
Solution Approach 1:
The patent combines multiple functions (data transmission, clock synchronization, and power supply) into a single bus line. The differential signal lines carry both data and clock signals simultaneously, while the same lines also provide power to the slave device through the differential voltage between the signals, eliminating the need for separate power and clock bus lines.
Solution Approach 2:
The bus line is designed to serve multiple purposes: it transmits data signals, provides clock synchronization through embedded clocking, and supplies power to the slave device. This multi-functional design reduces the overall number of bus lines required while maintaining system reliability.
2Power
If additional bus lines are added for power supply, then the slave bus controller can be powered reliably, but the physical connections and pin requirements increase
Solution Approach 1:
The patent merges the power supply function with the data transmission function by using the differential voltage between the two signal lines of the same bus to power the slave device. This eliminates the need for dedicated power bus lines while ensuring reliable power delivery.
Solution Approach 2:
The bus line itself generates the power needed by the slave device through its differential signal operation. The voltage difference between the two signal lines during data transmission is sufficient to power the slave controller, making the system self-sufficient without external power connections.
3Measurement precision
If separate clock lines are provided for synchronization, then data synchronization is improved, but the number of bus lines and pins increases
Solution Approach 1:
The patent combines data transmission and clock synchronization into a single differential bus line. The clock signal is embedded within the data transmission protocol, allowing the slave device to synchronize with the master device using the same bus line that carries data, eliminating the need for separate clock lines.
Solution Approach 2:
The differential bus line serves dual purposes: transmitting data and providing clock synchronization signals. The protocol embeds timing information within the data transmission sequence, enabling the same physical connection to fulfill both data communication and synchronization functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the physical connections required between master and slave bus controllers, enhancing efficiency and reducing the complexity of the bus interface while maintaining data integrity and synchronization.
Implementation Method 1
The slave bus controller includes power conversion circuitry configured to convert the input data signal from the master bus controller into a supply voltage
Data Source
AI summary
Embodiments of bus interface systems are disclosed. In one embodiment, a bus interface system includes a master bus controller and a slave bus controller coupled along a bus line. The master bus controller is configured to generate an input data signal that is received by the slave bus controller along the bus line. The slave bus controller includes power conversion circuitry configured to convert the input data signal from the master bus controller into a supply voltage. By providing the power conversion circuitry, the slave bus controller is powered using the input data signal and without requiring an additional bus line to transfer a supply voltage to the slave bus controller.