Bus Width Conversion Parity Handling for Forwarded Error Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing bus width conversion systems face challenges in ensuring high reliability by effectively handling parity and forwarded error detection across different data widths, particularly in mission-critical servers and storage units, where errors can occur during data transmission between devices with varying bus widths.
Innovation Solution
The system encodes forwarded error information and computes parity bits for input data, inverting them when a decoding error is indicated, and compares output parity bits with system output parity information to determine error flags, incrementing a counter for mismatches and setting flags based on threshold values to indicate parity and forwarded errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error detection methods are implemented in bus width conversion systems, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-computing system input parity information from input data before the bus width conversion occurs. This pre-computed parity information is stored and later used to verify the converted output data, enabling error detection without adding complex real-time computation during the conversion process itself.
Solution Approach 2:
The patent uses parity information as an intermediary element that mediates between the input data and output data. The system input parity information acts as a reference that can be compared against computed output parity information to detect errors, providing a simple yet effective error detection mechanism without requiring complex error correction codes or redundant data paths.
2Measurement precision
If parity information is computed and compared for error detection, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The system pre-computes and stores system input parity information before the bus width conversion operation. This eliminates the need for time-consuming parity computations during the actual data conversion and verification process, as the reference parity information is already available for immediate comparison.
3Reliability
If forwarded error information is inverted when decoding error occurs, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies inversion by inverting the system input parity information when a forwarded error is detected. Instead of adding complex error correction logic, the system simply inverts the stored parity information, which then serves as the reference for subsequent comparisons. This inversion technique allows the system to account for known errors in a straightforward manner.
Solution Approach 2:
The system converts the harmful effect of forwarded errors into a beneficial reference by inverting the parity information when errors are detected. This inverted parity information becomes a useful reference that helps identify subsequent errors or verify data integrity, turning the presence of errors into a means for improved error detection.
Data Source
AI summary
Systems and methods are provided for encoding forwarded error for data bus width conversion. Input data and input forwarded error information are received. System input parity information is computed based on the input data and the input forwarded error information. Output data based on the input data and system output parity information based on the system input parity information are provided, and it is determined whether to indicate a forwarded error output based on the output data and the system output parity information.