Byte-Wise Mux Routing for Interleaved Segment Loads and Stores
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Solution Overview
Problem
Existing methods for loading and storing data with interleaved types in processing systems are inefficient and costly, requiring dedicated logic or taking too long due to loading one element at a time.
Innovation Solution
Utilize a byte-wise anything-to-anything multiplexer (mux) to rearrange data within the CPU, ensuring same-type data is loaded into the same register and stored in the correct order without additional logic, using a byte-wise anything-to-anything mux for both load and store operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in memory as interleaved elements of different data types, then memory storage is convenient and compact, but loading and storing operations become slow and inefficient
Solution Approach 1:
The patent segments the interleaved data into distinct data types and routes each segment to appropriate registers or memory locations using a mux tree structure. This segmentation allows parallel processing of different data types while maintaining the compact interleaved storage format in memory.
Solution Approach 2:
The patent introduces a new dimensional organization by using a tree-structured mux hierarchy with multiple levels. Instead of sequential element-by-element processing, data is reorganized through multiple dimensions of multiplexing stages, enabling simultaneous routing of multiple data elements through different paths in the mux tree.
2Productivity
If dedicated logic is used to load all data into memory, shuffle the data, and write to correct registers, then data loading efficiency improves, but hardware area cost increases
Solution Approach 1:
The patent makes the existing mux infrastructure multi-functional by using it for both data routing during load operations and data shuffling during store operations. This universal usage of the mux tree eliminates the need for separate dedicated logic units, reducing hardware area while maintaining high data loading and storing efficiency.
Solution Approach 2:
The existing mux tree structure serves itself by handling both load and store operations without requiring additional dedicated logic. The same multiplexer infrastructure that routes data during loading also performs the shuffling function during storing operations, making the system self-sufficient and reducing overall hardware complexity.
3Manufacturing precision
If one element of data is loaded at a time into the correct register, then data is placed in the correct location, but the loading process is slow and inefficient
Solution Approach 1:
The patent performs preliminary routing of data elements through the mux tree structure before final registration. Data is pre-organized and pre-routed through multiple multiplexing stages, with each stage preparing the data for its final destination. This preliminary action enables parallel processing of multiple elements simultaneously while ensuring correct final placement.
Solution Approach 2:
The mux tree structure acts as an intermediary between memory and registers, providing multiple intermediate routing stages. Instead of direct element-to-register mapping, data passes through intermediate multiplexer levels that enable parallel processing and efficient routing, maintaining placement accuracy while dramatically improving loading speed.
Data Source
AI summary
Segment load operations are performed by processing data through an anything-to-anything mux, and sections writing elements to respective storage locations based on corresponding indices of the elements and the storage locations. Once all of the elements are loaded into the correct storage location, each location is read again with the elements of that storage location being sent through the mux, arranged) into the correct order, and written back to the same register.