Semiconductor Device With C-Axis Aligned Oxide Semiconductor

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving reliable, miniaturized, highly integrated, and low-power consumption transistors with stable electrical characteristics and minimal variations in transistor performance, particularly in utilizing oxide semiconductors with c-axis aligned crystalline structures.

Innovation Solution

A semiconductor device structure incorporating a specific layer configuration with In-M-Zn oxide layers and tantalum nitride conductors, where the conductors have a cubic crystal structure with (111) orientation and low lattice mismatch, and the use of heat treatment and sputtering methods to form island-shaped metal oxide films, ensuring optimal crystallinity and reduced impurity diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If oxide semiconductors with c-axis aligned crystalline structures are used to form transistors, then electrical characteristics and reliability are improved, but manufacturing precision and control of transistor performance variations become more difficult

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidtransistor performance uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by precisely controlling the sputtering conditions (power, gas flow rate, substrate temperature) and heat treatment parameters (temperature, atmosphere, time) to form oxide semiconductor films with specific c-axis alignment degrees and crystalline structures. By adjusting these parameters, the invention achieves consistent transistor characteristics across wafers while maintaining high reliability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs preliminary action through pre-heating the substrate before forming the oxide semiconductor film, and performing initial heat treatment to establish the desired crystalline structure before subsequent processing steps. This preliminary preparation ensures that the oxide semiconductor maintains optimal c-axis alignment and electrical characteristics throughout manufacturing.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If transistor miniaturization and high integration are pursued, then device density and functionality are improved, but electrical characteristics stability and on-state current performance deteriorate

Engineering Contradiction:
Improvedevice integration densityVSAvoidelectrical characteristics stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by forming oxide semiconductor films with locally optimized c-axis alignment in the channel formation regions, while using different material compositions and structures in source/drain regions. This localized optimization maintains excellent electrical characteristics even as transistors are miniaturized and highly integrated.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by combining oxide semiconductors with specific crystalline structures with metal nitride barriers and insulating layers. This composite structure provides both the high on-state current needed for miniaturized devices and the electrical stability required for reliable operation in highly integrated circuits.

Inventive Principle:
Principle #40Composite materials

3Use of energy by moving object

If power consumption is reduced, then energy efficiency is improved, but on-state current and switching performance may worsen

Engineering Contradiction:
Improvepower consumptionVSAvoidon-state current
Core Design Contradiction:
Use of energy by moving objectVSPower

Solution Approach 1:

The patent applies parameter changes by optimizing the oxide semiconductor composition (In-Ga-Zn-O ratios) and crystalline structure to achieve high carrier mobility and low off-state current simultaneously. By precisely controlling the c-axis alignment degree and heat treatment parameters, the invention enables transistors with low power consumption that maintain adequate on-state current for practical applications.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides semiconductor devices with improved electrical characteristics, high on-state current, low power consumption, and reduced variations in transistor performance, enabling miniaturization and high integration while maintaining reliability.

Implementation Method 1

a first metal oxide film is formed; a second metal oxide film is formed over the first metal oxide film

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 2

a step of performing heat treatment on the first metal oxide film and the second metal oxide film at higher than or equal to 500° C. and lower than 600° C.

Methodology Applied
Scientific EffectHeat treatment: Heat Treatment

Data Source

PatentUS20220271167A1Semiconductor Device and Method For Manufacturing Semiconductor Device
Publication Date: 2022.08.25 SEMICON ENERGY LAB CO LTD
  • US20220271167A1 patent drawing
  • US20220271167A1 patent drawing
  • US20220271167A1 patent drawing

AI summary

A semiconductor device with high reliability is provided. The semiconductor device includes a first oxide; a first conductor, a second conductor, and a first insulator over the first oxide; and a third conductor over the first insulator. The first conductor includes a first crystal. The second conductor includes a crystal having the same crystal structure as the first crystal. The first crystal has (111) orientation with respect to a surface of the first oxide. The first oxide includes a second crystal. The second crystal has c-axis alignment with respect to a surface where the first oxide is formed. The lattice mismatch degree of the first crystal with respect to the second crystal is lower than or equal to 8 percent.