C-Axis Aligned Oxide Semiconductor Stack for Low Power High Current
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving high on-state current, reliable electrical characteristics, and scalability while maintaining low power consumption and design flexibility, particularly in utilizing oxide semiconductors like In—Ga—Zn oxide with c-axis aligned crystalline structures.
Innovation Solution
A semiconductor device stack is designed with specific oxide layers having c-axis aligned crystal regions, where the c-axis is perpendicular to the plane of the oxide on the insulator side, and additional oxides with different c-axis orientations, along with conductors and insulators, to inhibit oxygen diffusion and enhance electrical properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If oxide semiconductor layers are used to reduce power consumption, then low power consumption is achieved, but on-state current is insufficient
Solution Approach 1:
The patent changes the crystalline structure parameters of the oxide semiconductor from amorphous or nanocrystalline to c-axis aligned crystalline (CAAC) structure, which fundamentally alters the electrical properties to achieve both low power consumption and high on-state current
Solution Approach 2:
The patent uses a composite structure with multiple oxide layers having different compositions and crystalline structures, where the CAAC-oxide semiconductor layer provides high on-state current while maintaining low power consumption characteristics
2Ease of manufacture
If conventional oxide semiconductor structures are used, then manufacturing is simpler, but electrical characteristics and reliability are insufficient
Solution Approach 1:
The patent applies local quality by creating specific c-axis aligned crystalline regions within the oxide semiconductor layers, where the crystal orientation is controlled to be perpendicular to the substrate in the channel formation region to achieve reliable electrical characteristics
Solution Approach 2:
The patent performs preliminary heat treatment or uses specific deposition conditions during manufacturing to pre-form the CAAC structure before device operation, ensuring reliable electrical characteristics are achieved during fabrication rather than requiring complex post-processing
3Productivity
If device scaling is pursued to increase integration, then productivity improves, but maintaining electrical characteristics becomes difficult
Solution Approach 1:
The patent utilizes the CAAC crystalline structure's inherent stability and uniformity, which can be maintained even at reduced dimensions, allowing device scaling while preserving electrical characteristics
Solution Approach 2:
The patent segments the oxide semiconductor into multiple layers with specific thicknesses and compositions, where each layer's thickness is controlled to maintain proper electrical characteristics even as overall device size is reduced for higher integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a semiconductor device with improved electrical characteristics, high reliability, and scalability, enabling efficient data retention, high-speed data writing, and reduced power consumption.
Implementation Method 1
the first oxide includes a first c-axis-aligned crystal region; and a c-axis of the first crystal region is substantially perpendicular to a plane of the first oxide on the insulator side
Data Source
AI summary
A stack with excellent electrical characteristics and reliability is provided. The stack includes an insulator, a conductor, and a first oxide between the insulator and the conductor; the first oxide includes a first c-axis-aligned crystal region; and a c-axis of the first crystal region is substantially perpendicular to a plane of the first oxide on the insulator side. Alternatively, the stack includes an insulator, a conductor, a first oxide between the insulator and the conductor, and a second oxide facing the first oxide with the insulator therebetween; the first oxide includes a first c-axis-aligned crystal region; a c-axis of the first crystal region is substantially perpendicular to a plane of the first oxide on the insulator side; the second oxide includes a second c-axis-aligned crystal region; and a c-axis of the second crystal region is substantially perpendicular to a plane of the second oxide on the insulator side.


