Cache Line ID Tracking for Parallel Request Handling
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Solution Overview
Problem
Existing cache systems are limited in handling multiple requests due to the need for maintaining address buffers, which increases complexity, power consumption, and cost, as the number of buffers required restricts the maximum number of requests that can be handled.
Innovation Solution
A master cache system that uses an ID value to identify both the master cache and a specific cache line, allowing retrieved data to be directly stored without the need for maintaining address buffers for each request, by including a line identification value in the ID field transmitted to the slave memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the cache maintains a specific number of address buffers for different requests, then the cache can handle a limited number of requests, but the area, power consumption, timing, complexity, and cost of the cache module increase
Solution Approach 1:
The patent extracts the request tracking functionality from the address buffer and relocates it to the ID field. By using the ID value to identify and track requests directly, the system eliminates the need for separate address buffers, thereby reducing area, power consumption, and complexity while maintaining the ability to handle multiple requests
Solution Approach 2:
The ID field is given multiple functions: it identifies the master cache, identifies the specific request, and serves as the tracking mechanism for request status. This multi-functionality eliminates the need for dedicated address buffers, reducing overall system complexity while handling multiple requests efficiently
2Productivity
If more address buffers are provisioned to increase the number of requests handled, then the cache can handle more requests, but the area, power consumption, timing, complexity, and cost increase
Solution Approach 1:
The patent removes the power-consuming address buffer component by extracting its functionality and embedding it within the ID field mechanism. The ID field naturally tracks requests without requiring additional power-intensive buffer storage, thereby increasing request handling capacity while reducing power consumption
3Productivity
If more address buffers are provisioned to increase the number of requests handled, then the cache can handle more requests, but the area of the cache module increases
Solution Approach 1:
The patent extracts the address buffer functionality and replaces it with the ID field mechanism. Since the ID field is already present in the protocol for master identification, reusing it for request tracking eliminates the need for additional buffer area, allowing more requests to be handled without increasing cache module area
Solution Approach 2:
The ID field serves multiple purposes including master identification and request tracking. This multi-functionality allows the system to handle more requests simultaneously without requiring additional area, as the same ID field infrastructure is reused for multiple tracking purposes
4Productivity
If more address buffers are provisioned to increase the number of requests handled, then the cache can handle more requests, but the timing and cost of the cache module increase
Solution Approach 1:
The patent removes the address buffer component that introduces timing delays associated with buffer management operations. By using the ID field directly for request tracking, the system eliminates buffer lookup and management overhead, thereby handling more requests without increasing timing delays
Solution Approach 2:
The ID field automatically tracks request status and enables request completion without requiring complex buffer management logic. This self-service mechanism reduces timing overhead by eliminating the need for additional buffer management operations, allowing faster handling of multiple requests
Data Source
AI summary
In an exemplary computer system having one or more masters configured to the same slave memory using a protocol, such as the AMBA AXI protocol, a master provides an ID field to the memory as part of a data request, where the ID field has a line ID sub-field that represents a line ID value that uniquely identifies a particular cache line (or subset of cache lines) in the master, where the memory returns the line ID value back to the master along with the retrieved data. The master uses the line ID value to identify the cache line into which the retrieved data is to be stored. In this way, the master does not need to maintain a queue of address buffers to retain the addresses for data requests currently being processed, where the size of the queue limits the number of parallel in-service data requests by the master.