Cache Line Mark Tracking via Private Buffer

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Solution Overview

Problem

Existing systems face performance issues due to the requirement to remove load-marks and store-marks from cache lines after each phase of operation, which can impede thread performance as they transition quickly between phases, leading to inefficiencies in marking and unmarking cache lines.

Innovation Solution

A system utilizing a content-addressable memory (CAM) to dynamically track load-marks and store-marks across phases of operation, allowing for efficient marking and unmarking by maintaining a record of cache lines with phase indicators and bit masks, enabling seamless transition between phases without interrupting thread performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the system removes load-marks and store-marks from cache lines after each phase of operation, then the marks are properly cleaned up, but thread performance is hampered due to the time required for marking and unmarking operations

Engineering Contradiction:
Improveproper cleanup of marksVSAvoidthread performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by maintaining a private buffer that pre-tracks cache line addresses before marks need to be removed. When transitioning between phases, the system has already prepared the necessary information in the buffer, allowing for faster mark removal without hampering thread performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The private buffer acts as an intermediary data structure that mediates between the marking operations and the cache line management. It stores cache line addresses and facilitates efficient tracking and removal of marks without requiring direct examination of all cache lines, thus improving thread performance while ensuring proper cleanup.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the system uses a private buffer to track cache line addresses, then marking operations can be monitored, but the buffer may fill up when threads quickly transition between phases, preventing new marks from being placed

Engineering Contradiction:
Improvetracking capabilityVSAvoidmarking capability
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The system changes the parameter of the private buffer by implementing a circular buffer structure where entries can be reused after being cleared. When the buffer appears full, the system can reuse existing buffer slots by clearing and repurposing them for new cache line addresses, allowing continuous tracking and marking operations without being limited by buffer size.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system discards old buffer entries that are no longer needed and recovers the buffer space for new uses. When cache lines are unmarked or phases transition, the corresponding buffer entries are cleared and made available for tracking new cache lines, ensuring the buffer remains effective even during rapid phase transitions.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS7917698B2Method and apparatus for tracking load-marks and store-marks on cache lines
Publication Date: 2011.03.29 ORACLE AMERICAN INC
  • US7917698B2 patent drawing
  • US7917698B2 patent drawing
  • US7917698B2 patent drawing

AI summary

Embodiments of the present invention provide a system that handles load-marked and store-marked cache lines. Upon asserting a load-mark or a store-mark for a cache line during a given phase of operation, the system adds an entry to a private buffer and in doing so uses an address of the cache line as a key for the entry in the private buffer. The system also updates the entry in the private buffer with information about the load-mark or store-mark and uses pointers for the entry and for the last entry added to the private buffer to add the entry to a sequence of private buffer entries placed during the phase of operation. The system then uses the entries in the private buffer to remove the load-marks and store-marks from cache lines when the phase of operation is completed.