CAM Packet Transfer Unit with Verification Information for Soft Error Correction

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Solution Overview

Problem

LAN switches using Content Addressable Memory (CAM) for high-speed packet routing are prone to soft errors due to radiation-induced bit inversions, leading to erroneous packet transfers, especially in Virtual Local Area Networks (VLANs) and Virtual Private Networks (VPNs), where error correction mechanisms can be timing-dependent and slow, compromising the high-speed searching advantage of CAM.

Innovation Solution

A packet transfer unit with a search key memory that stores verification information alongside search keys, allowing for accurate storage location acquisition even if soft errors occur, preventing erroneous transfers by using verification information to ensure correct packet routing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If CAM is used for high-speed packet routing, then searching speed is improved, but reliability deteriorates due to soft errors from radiation-induced bit inversions

Engineering Contradiction:
Improvesearching speedVSAvoidpacket transfer accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-storing verification information (parity bits) together with search keys in the CAM before searching occurs. When a search is performed, the verification information is immediately available to detect and correct soft errors without requiring additional processing time, thus maintaining high-speed operation while improving reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces verification information as an intermediary element that mediates between the search key and the routing decision. This verification information acts as a check mechanism that can detect and correct bit inversions caused by soft errors, ensuring accurate packet routing while preserving the high-speed searching capability of CAM.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If error correction mechanisms are added to CAM, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidhardware complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the error correction function with the existing CAM structure by integrating verification information storage directly into the CAM memory cells. Instead of adding separate error correction hardware, the verification bits are combined with the search keys in the same memory array, reducing overall device complexity while maintaining reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements self-service by enabling the CAM to automatically detect and correct its own errors using the stored verification information. The system performs self-diagnosis and self-correction without requiring external error correction hardware or complex additional mechanisms, thus improving reliability without significantly increasing device complexity.

Inventive Principle:
Principle #25Self-service

3Reliability

If verification information is stored with search keys, then reliability is improved, but memory capacity is reduced

Engineering Contradiction:
Improveerror detection accuracyVSAvoidmemory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies partial action by storing verification information for only the critical search key data that is essential for accurate routing decisions. Rather than verifying every single bit uniformly, the system focuses verification resources on the most important fields, achieving adequate reliability while minimizing the overhead on memory capacity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7522592B2Packet transfer unit
Publication Date: 2009.04.21 ALAXALA NETWORKS
  • US7522592B2 patent drawing
  • US7522592B2 patent drawing
  • US7522592B2 patent drawing

AI summary

The present invention relates to a packet transfer unit, which comprises a search key memory that stores a search key for a transfer destination of a packet and verification information generated from the search key, in association with a storage location of transfer information memorized in a transfer information memory, wherein a transfer information acquisition unit searches the search key memory by using the search key generated based on the header information and the verification information generated from the search key, acquires storage location information of the transfer information from the search key memory when a match with the search key and the verification information memorized in the search key memory is found, and acquires the transfer information stored in the transfer information memory based on the acquired storage location information, and wherein a transfer unit transfers the packet based on the acquired transfer information.