Selective Cap Dielectric for 3D NAND Pillar Alignment
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Solution Overview
Problem
As memory density increases in 3D NAND memory devices, higher aspect ratios of pillars lead to increased possibilities for pillar misalignment, cell film voids, and reduced conductive connectivity, which existing technologies struggle to address effectively.
Innovation Solution
A cap dielectric material is introduced that is selectively removable relative to the dielectric materials in the tiers, allowing for the formation of pillar openings with different critical dimensions at the top and bottom, preventing voids and misalignment by enabling precise formation of pillars and conductive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory density increases in 3D NAND memory devices, then storage capacity is improved, but pillar aspect ratio increases leading to misalignment and void formation
Solution Approach 1:
The cap dielectric material is segmented into multiple portions with different etch rates. The first portion has a higher etch rate than the second portion, allowing differential removal during fabrication. This segmentation enables the formation of pillar openings with controlled critical dimensions that accommodate the increased aspect ratio without causing misalignment or void formation, thus resolving the contradiction between higher memory density and pillar alignment precision.
2Quantity of substance
If pillar aspect ratio increases to achieve higher memory density, then storage capacity is improved, but conductive connectivity is reduced
Solution Approach 1:
Different portions of the cap dielectric material are assigned different etch rates to create local variations in material removal. The first portion with higher etch rate and the second portion with lower etch rate are strategically positioned to form pillar openings with optimized critical dimensions. This local quality differentiation ensures that the pillar structures maintain adequate conductive connectivity even as the overall aspect ratio increases to achieve higher memory density.
3Manufacturing precision
If cap dielectric material has different etch rate than underlying dielectric materials, then selective removal is enabled for precise pillar opening formation, but material complexity increases
Solution Approach 1:
The cap dielectric material is designed with different etch rate parameters compared to the underlying dielectric materials. Specifically, the first portion of the cap dielectric material has a higher etch rate than the second portion, and both differ from the etch rates of the underlying dielectric materials. This parameter differentiation enables selective removal during fabrication, allowing precise control of pillar opening critical dimensions while maintaining manageable material complexity through systematic etch rate variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces misalignment and voids in pillars, enhancing the process margin for subsequent processes and improving the electrical connectivity between decks in 3D NAND memory devices without affecting the electrical performance or downstream processes.
Implementation Method 1
The cap dielectric material is formulated to be selectively removable relative to a dielectric material present in tiers of alternating dielectric materials and nitride materials
Data Source
AI summary
A microelectronic device includes tiers of alternating dielectric and conductive materials, a cap oxide material vertically adjacent to the tiers, and pillars extending vertically through the tiers. The cap oxide material is formulated to exhibit a different etch rate relative to an etch rate of the oxide material of the tiers. Additional microelectronic devices, microelectronic systems, and methods of forming a microelectronic device are also disclosed.