Capacitive D/A Converter With Dynamic Gate Bias for Low Distortion

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Solution Overview

Problem

Existing DA conversion devices face challenges in reducing power consumption while maintaining low distortion characteristics, particularly due to signal dependency on transistor resistance values which increases power consumption and distortion.

Innovation Solution

Incorporating a level determiner and a setting part within the DA conversion device to dynamically adjust gate-source voltages of transistors based on signal levels, using a clock signal to manage connection states and voltage settings, thereby reducing power consumption and distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If high gate-source voltages are applied to transistors to reduce signal dependency of resistance values, then distortion characteristics are improved, but power consumption increases

Engineering Contradiction:
Improvedistortion characteristicsVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the gate-source voltages of the transistors variable rather than fixed. The control circuit dynamically adjusts the gate-source voltages based on the signal level detected by the level detector. When the input signal level is high, higher gate-source voltages are applied to reduce distortion; when the signal level is low, lower gate-source voltages are applied to reduce power consumption. This dynamic adaptation resolves the contradiction between distortion performance and power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of gate-source voltage from a fixed value to a variable value that depends on signal level. The level detector monitors the input signal level and the control circuit adjusts the gate-source voltages accordingly. This parameter change allows the system to optimize between distortion characteristics and power consumption by adapting the voltage levels to the actual operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If fixed high gate-source voltages are used to improve linearity, then distortion is reduced, but power consumption increases

Engineering Contradiction:
ImprovelinearityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by stationary object

Solution Approach 1:

The system transitions from fixed gate-source voltages to dynamic gate-source voltages that adapt to signal levels. The level detector and control circuit enable the transistors to operate with optimized voltage levels in real-time, maintaining high linearity when needed while reducing power consumption during low-signal conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The gate-source voltage parameter is changed from a constant high value to a variable value that changes based on signal level. This allows the system to maintain good linearity characteristics when the input signal requires it, while reducing power consumption when high linearity is not critical for the current signal conditions.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20200328759A1Da conversion device
Publication Date: 2020.10.15 ASAHI KASEI MICRODEVICES CORP
  • US20200328759A1 patent drawing
  • US20200328759A1 patent drawing
  • US20200328759A1 patent drawing

AI summary

A DA conversion device includes a level determiner determining whether a level of the digital signal or the analog signal is higher than a predetermined threshold value; a DA converter including plural capacitors, an operational amplifier which generates the analog signal, and a plurality of transistors which connects each of the plural capacitors to a first or a second reference voltage according to the digital signal in a first connection state and connects the plural capacitors between an input terminal and an output terminal of the operational amplifier in a second connection state; and a setting part which receives a clock signal and sets gate-source voltages of the plurality of transistors such that the plurality of transistors is in the first connection state in a first period of the clock signal and the plurality of transistors is in the second connection state in a second period of the clock signal.