Capacitive DAC Data Sampler for Low-Offset Threshold Control
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Solution Overview
Problem
Conventional data samplers face impairments such as input-referred offsets, finite step size quantization, and noise, which affect the linearity and reliability of sample voltage values, leading to degraded performance in high-speed serial data communication systems.
Innovation Solution
A data sampler with capacitive digital-to-analog converters (DACs) is employed to adjust the threshold voltage range, using a pair of capacitive DACs to set the threshold voltage and redistribute charge, ensuring symmetry and improving performance metrics like common-mode rejection and threshold voltage control, while maintaining a low capacitive load on signal inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional data samplers are used, then the basic sampling function is performed, but input-referred offsets, finite step size quantization, and noise degrade the linearity and reliability of sample voltage values
Solution Approach 1:
The patent introduces capacitive DACs as intermediary components between the digital control signals and the analog threshold voltage. These capacitive DACs convert digital threshold codes into precise analog threshold voltages by redistributing charge on capacitor arrays, thereby mediating the conversion process and eliminating direct digital-to-analog voltage conflicts that cause offsets and noise. The capacitive structure acts as a buffer that isolates the digital control logic from the analog sampling circuitry.
Solution Approach 2:
The patent changes the physical parameter of threshold voltage control from direct voltage switching to capacitive charge redistribution. By using capacitive DACs, the threshold voltage is adjusted through changing the charge state of capacitor arrays rather than directly switching voltage levels. This parameter change enables finer resolution and reduces quantization errors while maintaining low noise, as the capacitive structure naturally filters high-frequency switching noise.
2Adaptability or versatility
If the threshold voltage range is increased to accommodate larger offset variations, then the sampler can handle more variations, but the capacitive load on signal inputs increases
Solution Approach 1:
The patent segments the threshold voltage adjustment function into two independent parts: (1) a large-range coarse adjustment handled by the capacitive DAC's capacitor array switching, and (2) a fine-range adjustment handled by a separate fine-tuning mechanism. This segmentation allows the system to achieve a wide overall threshold voltage range while keeping the capacitive load on signal inputs low, as each segment operates with smaller individual capacitance requirements.
Solution Approach 2:
The patent adds a temporal dimension to threshold voltage control by using two-stage adjustment: first setting the coarse threshold level, then fine-tuning it. This dimensional approach to control (coarse then fine) enables achieving a large effective threshold voltage range without requiring proportionally large capacitance values, as the fine-tuning stage compensates for the limited range of each individual stage.
3Speed
If fast sampling is implemented to meet high-speed serial data communication requirements, then the link rate increases, but circuit non-idealities and noise have more impact on performance
Solution Approach 1:
The patent employs periodic clocked operation of the capacitive DAC, where the capacitor arrays are charged and discharged in synchronized periodic cycles aligned with the sampling clock. This periodic action ensures that the threshold voltage is refreshed and stabilized before each sampling event, reducing the impact of circuit non-idealities and noise. The regular timing also allows for predictable signal integrity analysis and optimization at high speeds.
Solution Approach 2:
The patent performs preliminary threshold voltage setup through the capacitive DAC before the actual sampling operation. The capacitive DAC pre-establishes the correct threshold voltage level based on the desired sampling point, allowing the main sampling circuit to operate at full speed without being disturbed by threshold adjustment dynamics during the critical sampling window. This preliminary action separates the threshold setting function from the high-speed sampling function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a data sampler with improved accuracy, low static and dynamic offsets, a large threshold voltage range, and optimized power usage, enabling fast and reliable sampling with a well-defined sampling instant, suitable for both data comparators and error comparators.
Implementation Method 1
data sampler with capacitive digital-to-analog converters (DACs) for adjusting a threshold voltage range of the data sampler
Data Source
AI summary
Various embodiments provide for a data sampler with one or more capacitive digital-to-analog converters (DACs) for adjusting a threshold voltage range of the data sampler. According to some embodiments, two or more capacitive DACs can be used to set a threshold voltage for a data sampler and, by doing so, serve as a trigger mechanism for the data sampler.