Capacitive Isolation Circuit with Dual Channels for Symmetric Data Timing

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Solution Overview

Problem

Existing galvanically-isolated communication circuits face challenges with robustness against common mode transients, asymmetric propagation delays, asymmetric current consumption, and jitter, particularly in pulse transmission and OOK modulation techniques.

Innovation Solution

A communication circuit design utilizing two parallel channels with high-voltage capacitors for transmitting carrier signals during '0' and '1' logic levels, combined with a selector to produce a symmetric output, and a receiver with a common mode transient filter and trans-impedance amplifiers to demodulate signals, ensuring symmetric propagation delays and constant current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pulse transmission technique is used for data signal transfer across galvanic isolation barrier, then data transmission capability is achieved, but robustness against common mode transients deteriorates

Engineering Contradiction:
Improverobustness against common mode transientsVSAvoidsignal transmission reliability
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The data signal transmission is segmented into two separate differential channels, each capable of independent operation. This segmentation allows the system to switch between channels based on which one is less affected by common mode transients, thereby maintaining robustness while ensuring continuous reliable data transmission.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically changes transmission parameters by switching between two different transmission channels depending on the presence of common mode transients. This parameter change enables the system to adapt to varying electromagnetic conditions and maintain reliable communication despite transient interference.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If OOK modulation technique is used for data signal transfer, then galvanic isolation is achieved, but asymmetric propagation delays and asymmetric current consumption occur

Engineering Contradiction:
Improvegalvanic isolation performanceVSAvoidpropagation delay symmetry
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system intentionally employs asymmetric current consumption in the OOK modulators to achieve symmetric propagation delays. By adjusting the bias currents in the two OOK modulators, the system compensates for inherent asymmetries and achieves balanced timing characteristics while maintaining galvanic isolation.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The system uses feedback mechanisms to monitor and adjust propagation delays in real-time. By measuring the actual delay differences and dynamically adjusting the OOK modulator parameters, the system maintains symmetric propagation delays despite variations in operating conditions.

Inventive Principle:
Principle #23Feedback

3Reliability

If OOK modulation is used for signal transmission across isolation barrier, then galvanic isolation is maintained, but jitter is introduced in output data signal

Engineering Contradiction:
Improvegalvanic isolationVSAvoidoutput signal timing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The system introduces an intermediary delay element that compensates for the jitter introduced by OOK modulation. This intermediary component acts as a buffer that smooths out timing variations and eliminates jitter in the final output data signal while preserving the galvanic isolation benefit.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If single channel is used for data transmission, then device complexity is reduced, but robustness against common mode transients deteriorates

Engineering Contradiction:
Improvetransmission channel structureVSAvoidcommon mode transient immunity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system merges two differential channels into a unified transmission system with shared control logic and common mode rejection mechanisms. This merging approach provides robustness against common mode transients through differential signaling while avoiding the full complexity of completely independent dual-channel systems.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides improved robustness to common mode transients, symmetric propagation delays, constant current consumption, and eliminates jitter, while maintaining fault detection capabilities.

Implementation Method 1

A first capacitive isolation barrier has a first terminal coupled to the output of the first transmitter to propagate the first carrier signal. A second capacitive isolation barrier has a first terminal coupled to the output of the second transmitter to propagate the second carrier signal.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a receiver with a common mode transient filter and trans-impedance amplifiers to demodulate signals

Methodology Applied
Scientific EffectTrans-impedance amplification:

Implementation Method 3

a receiver with a common mode transient filter and trans-impedance amplifiers to demodulate signals

Methodology Applied
Scientific EffectFiltering: Filter (electronic)

Data Source

PatentEP4664774A1Galvanically-isolated communication circuit and method of transmitting a data signal across a capacitive isolation barrier
Publication Date: 2025.12.17 STMICROELECTRONICS INT NV
  • EP4664774A1 patent drawingFigure 1A~2
  • EP4664774A1 patent drawingFigure 3~4
  • EP4664774A1 patent drawingFigure 5~6

AI summary

In a galvanically-isolated communication circuit (70), an input (702) receives an input data signal (Data IN). A first transmitter (704a) transmits a first carrier (TX OUT_a) while the input data signal is asserted, and a second transmitter (704b) transmits a second carrier (TX_OUT_b) while the input data signal (Data IN) is de-asserted. A first capacitive barrier (712a) is coupled to the first transmitter (704a) to propagate the first carrier, and a second capacitive barrier (712b) is coupled to the second transmitter (704b) to propagate the second carrier. A receiver (708) is coupled to first and second capacitive barriers and is configured to: demodulate the first carrier to produce a replica of the input data signal (Data IN), and demodulate the second carrier to produce a complemented replica of the input data signal . A selector (709) is coupled to the receiver and is configured to produce an output data signal (Data_OUT) at an output terminal (710) by: passing the replica of the input data signal (Data IN) in response to a masking time interval elapsing after a falling edge of the output data signal (Data_OUT), and passing the complement of the complemented replica of the input data signal (Data IN) in response to a masking time interval elapsing after a rising edge of the output data signal (Data_OUT).