Capacitive Matrix With Variable Debye Length Word Lines
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Solution Overview
Problem
Current memory technologies face challenges in achieving high storage density, fast access times, and low energy consumption while avoiding parasitic coupling between neighboring cells, which limits their scalability and compatibility with silicon-based CMOS logic.
Innovation Solution
A capacitive matrix arrangement with word lines made of material having a variable Debye length, allowing for adaptive control of electric fields and capacitive coupling without transistors, combining the advantages of passive and active matrix architectures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If passive matrix architecture is used, then manufacturing simplicity and high storage density are achieved, but parasitic coupling between neighboring cells occurs and access speed is limited
Solution Approach 1:
The patent applies local quality by making the word line material properties location-dependent through Debye length modulation. The semiconductor word lines have locally variable charge carrier concentrations that create position-specific Debye lengths, enabling selective field transmission at crossing points while blocking parasitic coupling in non-selected regions. This resolves the contradiction by maintaining the simple passive matrix structure while adding local functional differentiation to eliminate harmful effects.
Solution Approach 2:
The patent implements dynamics by making the Debye length of the word line material variable and controllable. The charge carrier concentration in the semiconductor word lines can be dynamically adjusted to change the Debye length, allowing the system to switch between field-transmitting and field-blocking states. This dynamic property enables the same simple structure to adaptively prevent parasitic coupling only when needed, while maintaining manufacturing simplicity.
2Reliability
If active matrix with transistor control is used, then higher on/off ratios and capacitance switching are achieved, but device complexity and space requirements increase
Solution Approach 1:
The patent extracts the complex transistor switching mechanism and replaces it with a simpler semiconductor material-based Debye length control mechanism. By removing the transistor component entirely and using intrinsic semiconductor properties (charge carrier concentration modulation) to achieve field control, the system maintains high on/off ratios while significantly reducing device complexity and space requirements.
Solution Approach 2:
The patent substitutes the mechanical/electronic transistor switching system with a field-based semiconductor physics mechanism. Instead of using transistor gate control to switch capacitances, the system uses Debye length modulation in semiconductor word lines to control electric field transmission. This substitution eliminates the need for complex transistor circuits while achieving comparable or superior switching performance.
3Quantity of substance
If higher storage density is achieved through passive matrix, then manufacturing is simpler, but access time increases due to parasitic coupling
Solution Approach 1:
The patent applies local quality by creating position-specific Debye lengths in the semiconductor word lines. At selected crossing points, the Debye length is modulated to allow rapid field changes for fast access, while at non-selected crossing points, the Debye length blocks field transmission to prevent parasitic coupling. This local differentiation enables high storage density passive matrix architecture to achieve fast access times without sacrificing manufacturing simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables high storage density and fast access times while preventing parasitic coupling, reducing energy consumption and enhancing compatibility with silicon-based logic, thus addressing the limitations of existing memory technologies.
Implementation Method 1
The patent involves control of an electric field or potential through its modulation of the mobile carrier concentration in a semiconductor. For this purpose, the so-called Debye length is used, which indicates the typical shielding length of a field in a solid
Implementation Method 2
If the mobile charge carrier concentration n is very low, the Debye length is small and the field can easily penetrate the solid if it is significantly thinner than the Debye length. On the other hand, if the mobile charge carrier concentration is high, the field is well shielded
Implementation Method 3
The active medium (1) can be controlled by a current flow (11) or an electric field
Data Source
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AI summary
The invention relates to a capacitive matrix arrangement that comprises an active medium, which is arranged in a layer between word lines and bit lines whose crossing points have capacitor cells, selectable by actuation of the word lines and bit lines, arranged at them with the interposed active medium, and to an actuation method, wherein the invention is based on the object of combining active actuation of capacitive elements in a matrix with the advantages of passive actuation. This is achieved by virtue of the word lines having a specific variable Debye length, i.e. consisting of a material with a variable mobile charge carrier concentration, and being arranged between the active medium and a non-active dielectric. The actuation is effected by controlling the action of an electrical field.