Capacitive Memory Bit Cell for Accurate In-Memory Multiplication
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Solution Overview
Problem
Conventional computer systems face challenges in efficiently performing complex computation operations, such as multiply and accumulate operations, required by machine learning algorithms, due to high power dissipation and poor performance.
Innovation Solution
The use of capacitors in compute-memory circuits to store weight values and control the amount of charge coupled onto bit lines during multiplication operations, reducing variability and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional computer systems perform multiply and accumulate operations, then computation tasks can be executed, but power dissipation increases and performance deteriorates
Solution Approach 1:
The patent merges memory storage and computation functions into a single integrated structure. Memory cells store weight values and simultaneously perform multiplication operations with input data, eliminating the need to transfer data between separate memory and processing units. This combination reduces power dissipation from data movement and improves computational performance by enabling in-memory processing.
Solution Approach 2:
The patent replaces conventional transistor-based switching mechanisms with capacitor-based charge storage and transfer mechanisms. Capacitors store charge representing binary values and transfer this charge directly to bit lines during computation, reducing the energy required for operation compared to transistor switching and improving overall system efficiency.
2Measurement precision
If transistors are used to transfer charge onto bit lines during multiplication operations, then computation can be performed, but variability increases and accuracy decreases
Solution Approach 1:
The patent substitutes capacitor-based charge transfer for transistor-based charge transfer. Capacitors provide more consistent and predictable charge storage and transfer characteristics compared to transistors, which exhibit variability due to manufacturing tolerances, threshold voltage variations, and switching dynamics. This substitution reduces charge transfer variability and improves computation accuracy.
Solution Approach 2:
The patent changes the fundamental parameter used for charge transfer from transistor switching characteristics to capacitor charge storage characteristics. By utilizing the electrostatic charge storage capability of capacitors, the system achieves more stable and repeatable charge transfer operations, reducing variability and improving the reliability of computational results.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy and efficiency of in-memory computation by minimizing voltage level variations on bit lines, thereby improving the overall performance of machine learning operations.
Implementation Method 1
A given compute data storage cell of a plurality of compute data storage cells includes a capacitor and is configured to store a corresponding bit of the weight value, and couple, based on the corresponding bit and a voltage level of the compute select line, a respective amount of charge onto a compute bit line via the capacitor
Data Source
AI summary
A compute-memory circuit included in a computer system may include multiple compute data storage cells coupled to a compute bit line via respective capacitors. The compute data storage cells may store respective bits of a weight value. During a multiply operation, an operand may be used to generate a voltage level on a compute word line that is used to store respective amounts of charge on the capacitors, which are coupled to the compute bit line. The voltage on the compute bit line may be converted into multiple bits whose value is indicative of a product of the operand and the weight value.