Capacitive Microaccelerometers Thick SOI Substrates
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Solution Overview
Problem
Current microaccelerometers are bulky, complex, and power-intensive, with limited sensitivity and resolution, making them unsuitable for applications requiring low-power and small form-factor devices for sub-micro-gravity measurements, such as vibration and earthquake detection, and they face challenges in suppressing mechanical noise like Brownian motion.
Innovation Solution
The development of micro- and submicro-gravity capacitive micro-machined accelerometers fabricated on thick silicon-on-insulator (SOI) substrates using a high-aspect ratio fully-dry release process, which increases seismic mass and reduces in-plane stiffness, along with the deposition of doped polysilicon to minimize capacitive gaps and stiction, resulting in improved sensitivity and resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the inertial mass of the sensor is increased to suppress Brownian motion noise, then the device resolution is improved, but the device size and complexity increase
Solution Approach 1:
The patent utilizes the vertical dimension (thickness of silicon wafer) to increase inertial mass rather than expanding the horizontal footprint. By using full thickness of the silicon wafer and high aspect ratio sense gaps, the accelerometer achieves sub-micro-gravity resolution without proportionally increasing device area, thus resolving the contradiction between mass and size.
Solution Approach 2:
The patent employs composite structural design combining silicon wafer with sacrificial oxide layers and doped polysilicon. This composite approach allows optimization of mechanical properties (inertial mass, stiffness) and electrical properties (capacitive sensitivity) simultaneously, achieving high resolution with controlled device dimensions.
2Measurement precision
If high aspect ratio sense gaps are used to improve sensitivity, then the device sensitivity is enhanced, but the manufacturing precision requirements increase
Solution Approach 1:
The patent introduces a sacrificial oxide layer as an intermediary material to define the sense gaps. This oxide layer is removed in a wet oxide-etch step, allowing precise control of gap dimensions without requiring extremely tight tolerances in subsequent etching processes. The sacrificial layer acts as a template that ensures manufacturing precision for high aspect ratio gaps.
Solution Approach 2:
The patent employs doped polysilicon deposition to modify the gap geometry and electrical properties. By changing the material parameters (doping concentration, deposition thickness), the sense gaps achieve optimized capacitive sensitivity while maintaining manufacturability. The doped polysilicon allows for precise control of gap fill and surface properties.
3Ease of manufacture
If wet oxide-etch release step is used to remove sacrificial oxide, then the device is released from substrate, but stiction occurs that limits sensitivity
Solution Approach 1:
The patent converts the potentially harmful stiction effect during wet release into a beneficial outcome by optimizing the release conditions and sacrificial oxide removal process. The stiction that would normally limit sensitivity is controlled through proper process parameters, allowing the device to achieve high sensitivity while maintaining ease of manufacture through the wet release approach.
4Weight of moving object
If thick silicon wafer is used to increase inertial mass, then the device mass is increased, but the fabrication process complexity increases
Solution Approach 1:
The patent segments the fabrication process into distinct stages: sacrificial oxide deposition, pattern formation, high aspect ratio etching, doped polysilicon deposition, and release etching. This segmentation allows each step to be optimized independently, managing the overall process complexity while achieving the goal of increased inertial mass through controlled material deposition and removal.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves deep sub-micro-gravity resolution with reduced Brownian noise and power consumption, enabling small-footprint accelerometers with enhanced sensitivity and stability, suitable for various applications including space and seismic measurements.
Implementation Method 1
capacitive micro-machined accelerometers... sensitivity on the order of 0.2 pF/g... capacitive gaps... reduced capacitive gaps
Implementation Method 2
deposition of doped polysilicon to minimize capacitive gaps... LPCVD doped polysilicon layer... gap size reduction
Implementation Method 3
The dominant source of mechanical noise is the Brownian motion of air molecules hitting the circumferential surfaces of the small micromachined device
Implementation Method 4
Increasing the inertial mass of the sensor is the most effective way of improving the device performance... large seismic mass... suppressed Brownian noise
Data Source
AI summary
Disclosed are moveable microstructures comprising in-plane capacitive microaccelerometers, with submicro-gravity resolution (<200 ng/√Hz) and very high sensitivity (>17 pF/g). The microstructures are fabricated in thick (>100 μm) silicon-on-insulator (SOI) substrates or silicon substrates using a two-mask fully-dry release process that provides large seismic mass (>10 milli-g), reduced capacitive gaps, and reduced in-plane stiffness. Fabricated devices may be interfaced to a high resolution switched-capacitor CMOS IC that eliminates the need for area-consuming reference capacitors. The measured sensitivity is 83 mV/mg (17 pF/g) and the output noise floor is −91 dBm/Hz at 10 Hz (corresponding to an acceleration resolution of 170 ng/√Hz). The IC consumes 6 mW power and measures 0.65 mm2 core area.