Capacitor Arrangement Assisting Device for Power Supply Impedance

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Solution Overview

Problem

The design of capacitor arrangements in digital circuits faces challenges in achieving target power supply impedance, particularly in high-frequency ranges, due to the influence of equivalent series inductance (ESL) of capacitors and wiring inductance, which complicates the process and increases development time and costs.

Innovation Solution

A method and device that calculate the inductance per unit length of power supply wiring and determine the optimal wiring length to achieve a synthetic impedance less than or equal to the target impedance, using equations such as L0=μ0π⁢(hw)0.6, allowing for easier capacitor arrangement without trial and error, thereby reducing development time and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional trial-and-error method is used to determine capacitor arrangement, then power supply impedance can be adjusted, but development time and cost increase

Engineering Contradiction:
Improvepower supply impedanceVSAvoiddevelopment period
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent calculates the inductance per unit length of power supply wiring in advance using a predetermined formula (L0=μ0π(h/w)^0.6), and determines the maximum allowable wiring length before finalizing the capacitor arrangement. This preliminary calculation eliminates the need for trial-and-error adjustments during the design phase, directly reducing development time while ensuring the power supply impedance meets the target value.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If wiring length is increased to accommodate capacitor placement, then manufacturing ease improves, but power supply impedance increases

Engineering Contradiction:
Improvecapacitor arrangementVSAvoidpower supply impedance
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent transforms the complex impedance calculation problem into a simple wiring length constraint by deriving a maximum allowable wiring length formula. By changing the parameter from impedance (which requires complex calculations) to wiring length (which is straightforward to measure and control), the patent enables easy manufacturing while guaranteeing that the power supply impedance remains within the target value.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If complex simulations are used to calculate power supply impedance, then accuracy improves, but computational complexity and time increase

Engineering Contradiction:
Improvepower supply impedance calculationVSAvoidcalculation process
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the dominant factor (wiring inductance) from the complex power supply impedance calculation and focuses on calculating only this component using a simplified formula. By taking out the most significant contribution to impedance and calculating it separately, the patent achieves sufficient accuracy without requiring complex full-system simulations, thereby reducing computational complexity and time.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9117049B2Capacitor arrangement assisting method and capacitor arrangement assisting device
Publication Date: 2015.08.25 MURATA MFG CO LTD
  • US9117049B2 patent drawing
  • US9117049B2 patent drawing
  • US9117049B2 patent drawing

AI summary

A capacitor arrangement assisting method wherein data entered by a user, such as the width w of a power supply wiring, the thickness h of a dielectric between the power supply wiring and a ground plane, the ESLcap of a capacitor, and a target frequency fT and a target impedance ZT of an IC, are received, the maximum allowable wiring length lmax of the power supply wiring is calculated on the basis of the received width w of the power supply wiring, the thickness h of the dielectric, the ESLcap of the capacitor, and the target impedance ZT of the IC at the target frequency fT, and the calculated maximum allowable wiring length lmax is displayed.