Capacitor Array Structure Using a Retained Support Mask
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Solution Overview
Problem
Conventional methods for manufacturing capacitors in DRAMs face difficulties in process complexity and result in capacitors with poor structural stability and small capacitance due to the need to remove a polysilicon layer, which complicates the etching process and affects the capacitor's performance.
Innovation Solution
A method involving the formation of a laminated structure with sacrificial and support layers, where a patterned mask layer with a preset thickness is retained to serve as an additional support, eliminating the need for etching the mask layer and enhancing the structural stability and capacitance of the capacitor by acting as an additional support layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the polysilicon layer is removed through etching and cleaning steps, then the capacitor structure can be formed, but the process difficulty increases and structural stability decreases
Solution Approach 1:
The patterned mask layer serves dual purposes: as a patterning mask during etching and as an additional support layer for the capacitor structure. This self-service approach eliminates the need for separate removal steps while providing structural reinforcement, directly resolving the contradiction between ease of manufacture and structural stability
Solution Approach 2:
The patterned mask layer performs multiple functions simultaneously: it acts as the etching mask to define the capacitor hole pattern, and it serves as an additional support layer to enhance capacitor structural stability. This multi-functionality eliminates unnecessary removal steps and improves both manufacturing ease and structural reliability
2Reliability
If the patterned mask layer is removed after through hole formation, then the capacitor structure is completed, but the capacitance is reduced
Solution Approach 1:
The patterned mask layer is designed to serve dual purposes: as the etching mask and as an additional support layer that increases capacitor height and capacitance. By maintaining this layer rather than removing it, the invention achieves higher capacitance without adding separate structural elements, thus improving reliability without increasing device complexity
3Productivity
If conventional etching processes are used to remove the polysilicon layer, then the capacitor hole is formed, but the process complexity increases
Solution Approach 1:
The patterned mask layer automatically serves as both the etching mask and the final support structure, eliminating the need for additional removal steps. This self-service mechanism simplifies the etching process from multiple steps (etching, cleaning, removal) to a single integrated step, improving manufacturing efficiency while reducing process complexity
Solution Approach 2:
The invention extracts the unnecessary removal steps from the conventional process flow. By designing the patterned mask layer to remain as part of the final structure, the harmful or unnecessary action of removing this layer is eliminated, streamlining the manufacturing process and reducing complexity
Data Source
AI summary
The present disclosure provides a method for manufacturing capacitor array, including: forming, on an upper surface of the substrate, a laminated structure including sacrificial layers and support layers; forming a patterned mask layer on an upper surface of the laminated structure; etching the laminated structure based on the patterned mask layer to form a through hole, wherein after the through hole is formed, the patterned mask layer is retained on the upper surface of the laminated structure, and the through hole penetrates through the patterned mask layer and the laminated structure; forming a first electrode on a sidewall and at a bottom of the through hole; forming, in the patterned mask layer and the laminated structure, and removing the sacrificial layer based on the opening; forming a capacitor dielectric layer on a surface of the first electrode; and forming a second electrode on a surface of the capacitor dielectric layer.