Capacitor Carrier for Low Inductance Semiconductor Package
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Solution Overview
Problem
In semiconductor device packages, the placement of capacitors on wire-bonded ICs results in high loop inductance due to their distance from the IC die, affecting decoupling efficiency, and forming capacitors on the IC die is impractical due to space and cost constraints.
Innovation Solution
The method involves forming lands on the IC die and mounting capacitors to these lands, which are then wire-bonded to the carrier substrate, allowing capacitors to be closer to the die and reducing loop inductance, or using a capacitor carrier with lands and bond terminals attached to the IC die, ensuring effective decoupling capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If capacitors are located on the carrier substrate in a wire-bonded package, then the package structure is simple, but the distance between the die and capacitors results in high loop inductance
Solution Approach 1:
The patent introduces a vertical dimension by stacking the capacitor directly on top of the die in a three-dimensional configuration, rather than placing it horizontally on the carrier substrate. This vertical stacking reduces the current loop area and inductance while maintaining package simplicity
Solution Approach 2:
The patent uses a capacitor carrier as an intermediary substrate that holds the capacitor in close proximity to the die. This intermediary structure enables the capacitor to be positioned optimally for low inductance while maintaining ease of assembly and package simplicity
2Reliability
If capacitors are formed on the IC die itself, then the loop inductance is reduced, but the real estate on the IC die is consumed and the die size increases
Solution Approach 1:
The patent segments the capacitor from the IC die by placing it on a separate capacitor carrier rather than integrating it directly into the die. This segmentation maintains the low inductance benefit of close proximity while preserving the die area for active circuit elements
Solution Approach 2:
The patent moves the capacitor from the two-dimensional plane of the die to a vertical stacking arrangement in three-dimensional space, allowing the capacitor to be close to the die without consuming die area
3Reliability
If capacitors are formed on the IC die itself, then the loop inductance is reduced, but the cost of the IC die increases
Solution Approach 1:
The patent separates the capacitor fabrication process from the IC die fabrication process, allowing each to be optimized independently. The capacitor can be manufactured using standard SMT processes on the capacitor carrier, avoiding the high cost of modifying the IC die manufacturing process
Solution Approach 2:
The capacitor carrier serves as an intermediary that enables low-cost capacitor integration. By using a separate carrier substrate, the patent avoids the expensive process modifications required to form capacitors directly on the die while still achieving low inductance performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces loop inductance and enhances decoupling efficiency by placing capacitors closer to the IC die, improving power supply management without increasing the IC die size or cost.
Implementation Method 1
The mounting includes soldering the respective terminals of the at least one capacitor to the respective ones of the lands
Data Source
AI summary
A semiconductor device package and methods of manufacturing the same are described. In some examples, a semiconductor device includes an IC die including a ring of die pads around a periphery thereof, lands disposed within the ring of die pads, bond terminals coupled to the lands, the bond terminals being wire-bonded to respective ones of the die pads, and at least one capacitor having respective terminals mounted to respective ones of the lands.