Capacitor Electrode Structure with TiSiN Barrier Layer

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Solution Overview

Problem

Semiconductor devices require increased capacitance in limited areas, which is challenging due to the inverse proportionality of capacitance to equivalent oxide thickness and the need for high integration, leading to demands for innovative electrode structures and materials.

Innovation Solution

A semiconductor device with a lower electrode, conformally covered by a dielectric layer and an upper electrode, featuring a barrier layer and a capping layer, where the upper electrode and barrier layer share the same material but have different stress characteristics, and include a titanium-silicon nitride (TiSiN) middle layer, along with support patterns to enhance surface area and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the equivalent oxide thickness of the dielectric layer is reduced to increase capacitance, then the capacitance increases, but the manufacturing precision and reliability deteriorate

Engineering Contradiction:

ImprovecapacitanceVSAvoidequivalent oxide thickness control

Core Design Contradiction:

Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent employs a composite dielectric layer structure combining high-k dielectric material (such as HfO2, HfSiO, HfSiON) with conventional dielectric materials. This composite approach enables achieving high capacitance through the high dielectric constant of the high-k material rather than reducing thickness, thus avoiding the manufacturing precision issues associated with ultra-thin layer control while still achieving the desired capacitance increase.

Inventive Principle:

Principle #40Composite materials

2Quantity of substance

If the surface area of the electrode is increased by increasing the height of the lower electrode, then the capacitance increases, but the device complexity increases

Engineering Contradiction:

ImprovecapacitanceVSAvoidelectrode structure

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent utilizes a three-dimensional electrode structure where the lower electrode extends vertically with increased height, and the upper electrode conformally covers the dielectric layer that surrounds the lower electrode. This dimensional approach increases the effective surface area of the electrodes in the vertical dimension rather than expanding horizontally, thereby increasing capacitance without significantly increasing device footprint or overall structural complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If the surface area of the electrode is increased by using hemi-spherical grain (HSG) technique, then the capacitance increases, but the manufacturing precision deteriorates

Engineering Contradiction:

ImprovecapacitanceVSAvoidelectrode surface uniformity

Core Design Contradiction:

Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent employs the hemi-spherical grain (HSG) technique on the lower electrode, creating a curved surface that increases the effective surface area. The HSG structure provides uniform curvature that enhances capacitance while maintaining controllable manufacturing precision through standardized formation processes. The spherical geometry naturally distributes stress and provides consistent electrical characteristics across the electrode surface.

Inventive Principle:

Principle #14Spheroidality (Curvature)

4Quantity of substance

If a high-k dielectric layer is used to increase capacitance, then the capacitance increases, but the reliability deteriorates due to stress-related issues

Engineering Contradiction:

ImprovecapacitanceVSAvoiddielectric layer stability

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent carefully controls the thickness parameter of the high-k dielectric layer to optimize the balance between capacitance and reliability. By adjusting the thickness within specific ranges and combining it with appropriate dielectric materials, the patent achieves high capacitance while managing stress-related reliability issues. The conformal coverage by the upper electrode also helps distribute and reduce stress concentration in the high-k dielectric layer.

Inventive Principle:

Principle #35Parameter changes

5Quantity of substance

If the outer surface and inner surface of the OCS electrode are used to increase surface area, then the capacitance increases, but the device complexity increases

Engineering Contradiction:

ImprovecapacitanceVSAvoidelectrode configuration

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements an outer cylindrical storage (OCS) electrode structure where the upper electrode forms a cylindrical shape that surrounds the dielectric layer, which in turn surrounds the lower electrode. This nested configuration allows both the outer surface of the upper electrode and the inner surface of the dielectric layer to contribute to capacitance, effectively utilizing multiple surfaces without requiring separate electrode structures, thereby increasing capacitance while maintaining relatively simple device architecture.

Inventive Principle:

Principle #7Nested doll (Nesting)

Data Source

PatentUS9673272B2Semiconductor device including capacitor and method of fabricating the same

Publication Date: 2017.06.06 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor device includes a lower electrode on a lower structure, a dielectric layer conformally covering a surface of the lower electrode, an upper electrode conformally covering a surface of the dielectric layer, and a barrier layer on the upper electrode. The barrier layer and the upper electrode define a space on a sidewall of the lower electrode.