Multilayer Capacitor Electrode Structure for Void-Free Low ESR
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Solution Overview
Problem
Existing multilayer ceramic capacitors face issues with increased equivalent series resistance (ESR) due to irregular shapes and voids in internal electrode layers caused by differences in sintering temperatures between dielectric and metal components, leading to extended current paths and reduced mechanical strength.
Innovation Solution
A multilayer capacitor design with inner resin layers and internal electrode layers exposed at multiple surfaces, allowing for lower-temperature baking to prevent over-sintering, thereby maintaining linear electrode shapes and reducing ESR while enhancing mechanical strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the multilayer body and outer electrodes are fired at the same time to improve contact between internal electrode layers and outer electrodes, then the ESR is reduced, but the shapes of end portions of internal electrode layers become irregular or voids occur due to over-sintering of metal components
Solution Approach 1:
The patent divides the firing process into two separate stages: first firing the multilayer body to form the dielectric layers and internal electrode layers, then separately firing the outer electrodes. This segmentation prevents the metal components from being exposed to excessive temperature that would cause over-sintering, while still achieving good contact between the internal electrode layers and outer electrodes through the separate electrode firing step.
2Reliability
If the multilayer body and outer electrodes are fired at the same time, then the contact between internal electrode layers and outer electrodes is improved, but the mechanical strength is reduced due to irregular electrode shapes and voids
Solution Approach 1:
The patent separates the firing process into distinct stages, first forming the multilayer body with internal electrode layers, then separately applying and firing the outer electrodes. This ensures the internal electrode layers maintain their structural integrity and regular shapes, preventing void formation and maintaining mechanical strength, while still achieving reliable electrical contact through the separate electrode firing step.
3Reliability
If the metal components are sintered at high temperature to improve contact, then the ESR is reduced, but the current path extends due to irregular electrode shapes, leading to increased ESR
Solution Approach 1:
The patent separates the firing of the multilayer body from the firing of the outer electrodes. The internal electrode layers are first formed with regular shapes through controlled firing, then the outer electrodes are separately fired to establish contact. This prevents the metal components from being over-sintered, maintaining linear electrode shapes and ensuring the current path remains as short as possible, thereby minimizing ESR.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves reduced ESR and improved mechanical strength by minimizing voids and irregularities in electrode layers, ensuring a shorter current path and increased adhesion strength through controlled sintering temperatures.
Implementation Method 1
differences in sintering temperature between dielectric components included in the dielectric layer and metal components included in the internal electrode layers and the outer electrodes
Data Source
AI summary
A multilayer capacitor includes a multilayer body, and first and second outer electrodes on any one or more of first and second principal surfaces, first and second side surfaces, and first and second end surfaces of the multilayer body. The multilayer body includes an inner layer portion including inner resin layers, and first and second internal electrode layers each between two of the inner resin layers and exposed at any one or more of the first and second principal surfaces, the first and second side surfaces, and the first and second end surfaces.


