Multilayer Capacitor Grain Size Zoning for Breakdown Resistance
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Solution Overview
Problem
As multilayer ceramic capacitors (MLCCs) become smaller, it is challenging to enhance their electrical and structural reliability, particularly in terms of withstand voltage characteristics and frequency characteristics.
Innovation Solution
The multilayer capacitor design involves adjusting the average grain size of dielectric layers in different regions, with specific ratios and distributions, using a barium titanate-based ceramic material, to improve reliability by optimizing the grain size in active and side margin portions, and controlling the molar ratio of Ba to Ti in these regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the dielectric layer and internal electrode are formed to be thin to implement a smaller multilayer ceramic capacitor, then the size of the capacitor is reduced, but the electrical and structural reliability deteriorates
Solution Approach 1:
The patent applies local quality by creating different grain sizes in different regions of the dielectric layer. The central region has a first grain size while the side margin region has a second grain size that is larger than the first. This regional differentiation allows the thin dielectric layer to maintain small overall size while having locally optimized properties for reliability in the side margin regions where stress concentrations occur.
2Reliability
If the grain size of dielectric layer is increased to improve withstand voltage characteristic, then the reliability is improved, but the frequency characteristics and temperature characteristics may deteriorate
Solution Approach 1:
The patent resolves this contradiction by applying different grain sizes to different regions. The side margin region has larger grain size to improve withstand voltage and prevent breakdown at stress concentration points, while the central region maintains smaller grain size to preserve frequency and temperature characteristics. This spatial differentiation of grain size allows simultaneous optimization of both electrical properties.
3Volume of moving object
If the dielectric layer is made thinner to reduce capacitor size, then the miniaturization is achieved, but the withstand voltage capability deteriorates
Solution Approach 1:
The patent addresses this contradiction by creating larger grains specifically in the side margin regions of the thin dielectric layer where electrical breakdown is most likely to initiate. The central region maintains thin thickness for miniaturization while the side margins have enhanced grain structure for improved withstand voltage, allowing the thin dielectric to achieve both small size and adequate voltage tolerance.
Data Source
AI summary
A multilayer capacitor includes a body including a multilayer structure in which a plurality of dielectric layers are stacked in a first direction and a plurality of internal electrodes stacked with the dielectric layer interposed therebetween and external electrodes formed outside the body and connected to the internal electrodes. The body includes an active portion and a side margin portion covering the active portion and opposing each other in a second direction, and 1<A2/M1≤1.5 and A2<A1 in which A1 is an average grain size of the dielectric layers in a central region of the active portion, A2 is an average grain size of the dielectric layers at an active boundary part of the active portion adjacent to the side margin portion, and M1 is an average grain size of the dielectric layers in a central region of the side margin portion.